2 * Device Tree Source for AM4372 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 compatible = "ti,am4372", "ti,am43";
16 interrupt-parent = <&wakeupgen>;
21 device_type = "memory";
35 ethernet0 = &cpsw_emac0;
36 ethernet1 = &cpsw_emac1;
44 compatible = "arm,cortex-a9";
48 clocks = <&dpll_mpu_ck>;
51 operating-points-v2 = <&cpu0_opp_table>;
52 ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
53 ti,syscon-rev = <&scm_conf 0x600>;
55 clock-latency = <300000>; /* From omap-cpufreq driver */
59 cpu0_opp_table: opp_table0 {
60 compatible = "operating-points-v2";
63 opp-hz = /bits/ 64 <300000000>;
64 opp-microvolt = <950000 931000 969000>;
65 opp-supported-hw = <0xFF 0x01>;
70 opp-hz = /bits/ 64 <600000000>;
71 opp-microvolt = <1100000 1078000 1122000>;
72 opp-supported-hw = <0xFF 0x04>;
76 opp-hz = /bits/ 64 <720000000>;
77 opp-microvolt = <1200000 1176000 1224000>;
78 opp-supported-hw = <0xFF 0x08>;
82 opp-hz = /bits/ 64 <800000000>;
83 opp-microvolt = <1260000 1234800 1285200>;
84 opp-supported-hw = <0xFF 0x10>;
88 opp-hz = /bits/ 64 <1000000000>;
89 opp-microvolt = <1325000 1298500 1351500>;
90 opp-supported-hw = <0xFF 0x20>;
94 gic: interrupt-controller@48241000 {
95 compatible = "arm,cortex-a9-gic";
97 #interrupt-cells = <3>;
98 reg = <0x48241000 0x1000>,
100 interrupt-parent = <&gic>;
103 wakeupgen: interrupt-controller@48281000 {
104 compatible = "ti,omap4-wugen-mpu";
105 interrupt-controller;
106 #interrupt-cells = <3>;
107 reg = <0x48281000 0x1000>;
108 interrupt-parent = <&gic>;
112 compatible = "arm,cortex-a9-scu";
113 reg = <0x48240000 0x100>;
116 global_timer: timer@48240200 {
117 compatible = "arm,cortex-a9-global-timer";
118 reg = <0x48240200 0x100>;
119 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
120 interrupt-parent = <&gic>;
121 clocks = <&mpu_periphclk>;
124 local_timer: timer@48240600 {
125 compatible = "arm,cortex-a9-twd-timer";
126 reg = <0x48240600 0x100>;
127 interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
128 interrupt-parent = <&gic>;
129 clocks = <&mpu_periphclk>;
132 l2-cache-controller@48242000 {
133 compatible = "arm,pl310-cache";
134 reg = <0x48242000 0x1000>;
140 compatible = "ti,am4372-l3-noc", "simple-bus";
141 #address-cells = <1>;
144 ti,hwmods = "l3_main";
145 reg = <0x44000000 0x400000
146 0x44800000 0x400000>;
147 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
148 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
150 l4_wkup: l4_wkup@44c00000 {
151 compatible = "ti,am4-l4-wkup", "simple-bus";
152 #address-cells = <1>;
154 ranges = <0 0x44c00000 0x287000>;
156 wkup_m3: wkup_m3@100000 {
157 compatible = "ti,am4372-wkup-m3";
158 reg = <0x100000 0x4000>,
160 reg-names = "umem", "dmem";
161 ti,hwmods = "wkup_m3";
162 ti,pm-firmware = "am335x-pm-firmware.elf";
166 compatible = "ti,am4-prcm";
167 reg = <0x1f0000 0x11000>;
168 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
170 prcm_clocks: clocks {
171 #address-cells = <1>;
175 prcm_clockdomains: clockdomains {
180 compatible = "ti,am4-scm", "simple-bus";
181 reg = <0x210000 0x4000>;
182 #address-cells = <1>;
184 ranges = <0 0x210000 0x4000>;
186 am43xx_pinmux: pinmux@800 {
187 compatible = "ti,am437-padconf",
190 #address-cells = <1>;
192 #pinctrl-cells = <1>;
193 #interrupt-cells = <1>;
194 interrupt-controller;
195 pinctrl-single,register-width = <32>;
196 pinctrl-single,function-mask = <0xffffffff>;
199 scm_conf: scm_conf@0 {
200 compatible = "syscon";
202 #address-cells = <1>;
206 #address-cells = <1>;
211 wkup_m3_ipc: wkup_m3_ipc@1324 {
212 compatible = "ti,am4372-wkup-m3-ipc";
214 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
215 ti,rproc = <&wkup_m3>;
216 mboxes = <&mailbox &mbox_wkupm3>;
219 edma_xbar: dma-router@f90 {
220 compatible = "ti,am335x-edma-crossbar";
224 dma-masters = <&edma>;
227 scm_clockdomains: clockdomains {
232 emif: emif@4c000000 {
233 compatible = "ti,emif-am4372";
234 reg = <0x4c000000 0x1000000>;
238 edma: edma@49000000 {
239 compatible = "ti,edma3-tpcc";
241 reg = <0x49000000 0x10000>;
242 reg-names = "edma3_cc";
243 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
244 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
245 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
246 interrupt-names = "edma3_ccint", "edma3_mperr",
251 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
254 ti,edma-memcpy-channels = <58 59>;
257 edma_tptc0: tptc@49800000 {
258 compatible = "ti,edma3-tptc";
260 reg = <0x49800000 0x100000>;
261 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
262 interrupt-names = "edma3_tcerrint";
265 edma_tptc1: tptc@49900000 {
266 compatible = "ti,edma3-tptc";
268 reg = <0x49900000 0x100000>;
269 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
270 interrupt-names = "edma3_tcerrint";
273 edma_tptc2: tptc@49a00000 {
274 compatible = "ti,edma3-tptc";
276 reg = <0x49a00000 0x100000>;
277 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
278 interrupt-names = "edma3_tcerrint";
281 uart0: serial@44e09000 {
282 compatible = "ti,am4372-uart","ti,omap2-uart";
283 reg = <0x44e09000 0x2000>;
284 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
288 uart1: serial@48022000 {
289 compatible = "ti,am4372-uart","ti,omap2-uart";
290 reg = <0x48022000 0x2000>;
291 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
296 uart2: serial@48024000 {
297 compatible = "ti,am4372-uart","ti,omap2-uart";
298 reg = <0x48024000 0x2000>;
299 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
304 uart3: serial@481a6000 {
305 compatible = "ti,am4372-uart","ti,omap2-uart";
306 reg = <0x481a6000 0x2000>;
307 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
312 uart4: serial@481a8000 {
313 compatible = "ti,am4372-uart","ti,omap2-uart";
314 reg = <0x481a8000 0x2000>;
315 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
320 uart5: serial@481aa000 {
321 compatible = "ti,am4372-uart","ti,omap2-uart";
322 reg = <0x481aa000 0x2000>;
323 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
328 mailbox: mailbox@480C8000 {
329 compatible = "ti,omap4-mailbox";
330 reg = <0x480C8000 0x200>;
331 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
332 ti,hwmods = "mailbox";
334 ti,mbox-num-users = <4>;
335 ti,mbox-num-fifos = <8>;
336 mbox_wkupm3: wkup_m3 {
338 ti,mbox-tx = <0 0 0>;
339 ti,mbox-rx = <0 0 3>;
343 timer1: timer@44e31000 {
344 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
345 reg = <0x44e31000 0x400>;
346 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
348 ti,hwmods = "timer1";
351 timer2: timer@48040000 {
352 compatible = "ti,am4372-timer","ti,am335x-timer";
353 reg = <0x48040000 0x400>;
354 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
355 ti,hwmods = "timer2";
358 timer3: timer@48042000 {
359 compatible = "ti,am4372-timer","ti,am335x-timer";
360 reg = <0x48042000 0x400>;
361 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
362 ti,hwmods = "timer3";
366 timer4: timer@48044000 {
367 compatible = "ti,am4372-timer","ti,am335x-timer";
368 reg = <0x48044000 0x400>;
369 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
371 ti,hwmods = "timer4";
375 timer5: timer@48046000 {
376 compatible = "ti,am4372-timer","ti,am335x-timer";
377 reg = <0x48046000 0x400>;
378 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
380 ti,hwmods = "timer5";
384 timer6: timer@48048000 {
385 compatible = "ti,am4372-timer","ti,am335x-timer";
386 reg = <0x48048000 0x400>;
387 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
389 ti,hwmods = "timer6";
393 timer7: timer@4804a000 {
394 compatible = "ti,am4372-timer","ti,am335x-timer";
395 reg = <0x4804a000 0x400>;
396 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
398 ti,hwmods = "timer7";
402 timer8: timer@481c1000 {
403 compatible = "ti,am4372-timer","ti,am335x-timer";
404 reg = <0x481c1000 0x400>;
405 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
406 ti,hwmods = "timer8";
410 timer9: timer@4833d000 {
411 compatible = "ti,am4372-timer","ti,am335x-timer";
412 reg = <0x4833d000 0x400>;
413 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
414 ti,hwmods = "timer9";
418 timer10: timer@4833f000 {
419 compatible = "ti,am4372-timer","ti,am335x-timer";
420 reg = <0x4833f000 0x400>;
421 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
422 ti,hwmods = "timer10";
426 timer11: timer@48341000 {
427 compatible = "ti,am4372-timer","ti,am335x-timer";
428 reg = <0x48341000 0x400>;
429 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
430 ti,hwmods = "timer11";
434 counter32k: counter@44e86000 {
435 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
436 reg = <0x44e86000 0x40>;
437 ti,hwmods = "counter_32k";
441 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
443 reg = <0x44e3e000 0x1000>;
444 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
445 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
447 clocks = <&clk_32768_ck>;
448 clock-names = "int-clk";
453 compatible = "ti,am4372-wdt","ti,omap3-wdt";
454 reg = <0x44e35000 0x1000>;
455 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
456 ti,hwmods = "wd_timer2";
459 gpio0: gpio@44e07000 {
460 compatible = "ti,am4372-gpio","ti,omap4-gpio";
461 reg = <0x44e07000 0x1000>;
462 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
465 interrupt-controller;
466 #interrupt-cells = <2>;
471 gpio1: gpio@4804c000 {
472 compatible = "ti,am4372-gpio","ti,omap4-gpio";
473 reg = <0x4804c000 0x1000>;
474 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
477 interrupt-controller;
478 #interrupt-cells = <2>;
483 gpio2: gpio@481ac000 {
484 compatible = "ti,am4372-gpio","ti,omap4-gpio";
485 reg = <0x481ac000 0x1000>;
486 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
489 interrupt-controller;
490 #interrupt-cells = <2>;
495 gpio3: gpio@481ae000 {
496 compatible = "ti,am4372-gpio","ti,omap4-gpio";
497 reg = <0x481ae000 0x1000>;
498 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
501 interrupt-controller;
502 #interrupt-cells = <2>;
507 gpio4: gpio@48320000 {
508 compatible = "ti,am4372-gpio","ti,omap4-gpio";
509 reg = <0x48320000 0x1000>;
510 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
513 interrupt-controller;
514 #interrupt-cells = <2>;
519 gpio5: gpio@48322000 {
520 compatible = "ti,am4372-gpio","ti,omap4-gpio";
521 reg = <0x48322000 0x1000>;
522 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
525 interrupt-controller;
526 #interrupt-cells = <2>;
531 hwspinlock: spinlock@480ca000 {
532 compatible = "ti,omap4-hwspinlock";
533 reg = <0x480ca000 0x1000>;
534 ti,hwmods = "spinlock";
539 compatible = "ti,am4372-i2c","ti,omap4-i2c";
540 reg = <0x44e0b000 0x1000>;
541 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
543 #address-cells = <1>;
549 compatible = "ti,am4372-i2c","ti,omap4-i2c";
550 reg = <0x4802a000 0x1000>;
551 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
553 #address-cells = <1>;
559 compatible = "ti,am4372-i2c","ti,omap4-i2c";
560 reg = <0x4819c000 0x1000>;
561 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
563 #address-cells = <1>;
569 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
570 reg = <0x48030000 0x400>;
571 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
573 #address-cells = <1>;
579 compatible = "ti,omap4-hsmmc";
580 reg = <0x48060000 0x1000>;
583 ti,needs-special-reset;
586 dma-names = "tx", "rx";
587 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
592 compatible = "ti,omap4-hsmmc";
593 reg = <0x481d8000 0x1000>;
595 ti,needs-special-reset;
598 dma-names = "tx", "rx";
599 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
604 compatible = "ti,omap4-hsmmc";
605 reg = <0x47810000 0x1000>;
607 ti,needs-special-reset;
608 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
613 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
614 reg = <0x481a0000 0x400>;
615 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
617 #address-cells = <1>;
623 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
624 reg = <0x481a2000 0x400>;
625 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
627 #address-cells = <1>;
633 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
634 reg = <0x481a4000 0x400>;
635 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
637 #address-cells = <1>;
643 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
644 reg = <0x48345000 0x400>;
645 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
647 #address-cells = <1>;
652 mac: ethernet@4a100000 {
653 compatible = "ti,am4372-cpsw","ti,cpsw";
654 reg = <0x4a100000 0x800
656 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
657 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
658 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
659 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
660 #address-cells = <1>;
662 ti,hwmods = "cpgmac0";
663 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
664 <&dpll_clksel_mac_clk>;
665 clock-names = "fck", "cpts", "50mclk";
666 assigned-clocks = <&dpll_clksel_mac_clk>;
667 assigned-clock-rates = <50000000>;
669 cpdma_channels = <8>;
670 ale_entries = <1024>;
671 bd_ram_size = <0x2000>;
673 mac_control = <0x20>;
676 cpts_clock_mult = <0x80000000>;
677 cpts_clock_shift = <29>;
679 syscon = <&scm_conf>;
681 davinci_mdio: mdio@4a101000 {
682 compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
683 reg = <0x4a101000 0x100>;
684 #address-cells = <1>;
686 ti,hwmods = "davinci_mdio";
687 bus_freq = <1000000>;
691 cpsw_emac0: slave@4a100200 {
692 /* Filled in by U-Boot */
693 mac-address = [ 00 00 00 00 00 00 ];
696 cpsw_emac1: slave@4a100300 {
697 /* Filled in by U-Boot */
698 mac-address = [ 00 00 00 00 00 00 ];
701 phy_sel: cpsw-phy-sel@44e10650 {
702 compatible = "ti,am43xx-cpsw-phy-sel";
703 reg= <0x44e10650 0x4>;
704 reg-names = "gmii-sel";
708 epwmss0: epwmss@48300000 {
709 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
710 reg = <0x48300000 0x10>;
711 #address-cells = <1>;
714 ti,hwmods = "epwmss0";
717 ecap0: ecap@48300100 {
718 compatible = "ti,am4372-ecap",
722 reg = <0x48300100 0x80>;
723 clocks = <&l4ls_gclk>;
728 ehrpwm0: pwm@48300200 {
729 compatible = "ti,am4372-ehrpwm",
733 reg = <0x48300200 0x80>;
734 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
735 clock-names = "tbclk", "fck";
740 epwmss1: epwmss@48302000 {
741 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
742 reg = <0x48302000 0x10>;
743 #address-cells = <1>;
746 ti,hwmods = "epwmss1";
749 ecap1: ecap@48302100 {
750 compatible = "ti,am4372-ecap",
754 reg = <0x48302100 0x80>;
755 clocks = <&l4ls_gclk>;
760 ehrpwm1: pwm@48302200 {
761 compatible = "ti,am4372-ehrpwm",
765 reg = <0x48302200 0x80>;
766 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
767 clock-names = "tbclk", "fck";
772 epwmss2: epwmss@48304000 {
773 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
774 reg = <0x48304000 0x10>;
775 #address-cells = <1>;
778 ti,hwmods = "epwmss2";
781 ecap2: ecap@48304100 {
782 compatible = "ti,am4372-ecap",
786 reg = <0x48304100 0x80>;
787 clocks = <&l4ls_gclk>;
792 ehrpwm2: pwm@48304200 {
793 compatible = "ti,am4372-ehrpwm",
797 reg = <0x48304200 0x80>;
798 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
799 clock-names = "tbclk", "fck";
804 epwmss3: epwmss@48306000 {
805 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
806 reg = <0x48306000 0x10>;
807 #address-cells = <1>;
810 ti,hwmods = "epwmss3";
813 ehrpwm3: pwm@48306200 {
814 compatible = "ti,am4372-ehrpwm",
818 reg = <0x48306200 0x80>;
819 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
820 clock-names = "tbclk", "fck";
825 epwmss4: epwmss@48308000 {
826 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
827 reg = <0x48308000 0x10>;
828 #address-cells = <1>;
831 ti,hwmods = "epwmss4";
834 ehrpwm4: pwm@48308200 {
835 compatible = "ti,am4372-ehrpwm",
839 reg = <0x48308200 0x80>;
840 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
841 clock-names = "tbclk", "fck";
846 epwmss5: epwmss@4830a000 {
847 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
848 reg = <0x4830a000 0x10>;
849 #address-cells = <1>;
852 ti,hwmods = "epwmss5";
855 ehrpwm5: pwm@4830a200 {
856 compatible = "ti,am4372-ehrpwm",
860 reg = <0x4830a200 0x80>;
861 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
862 clock-names = "tbclk", "fck";
867 tscadc: tscadc@44e0d000 {
868 compatible = "ti,am3359-tscadc";
869 reg = <0x44e0d000 0x1000>;
870 ti,hwmods = "adc_tsc";
871 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
872 clocks = <&adc_tsc_fck>;
875 dmas = <&edma 53 0>, <&edma 57 0>;
876 dma-names = "fifo0", "fifo1";
879 compatible = "ti,am3359-tsc";
883 #io-channel-cells = <1>;
884 compatible = "ti,am3359-adc";
889 sham: sham@53100000 {
890 compatible = "ti,omap5-sham";
892 reg = <0x53100000 0x300>;
895 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
899 compatible = "ti,omap4-aes";
901 reg = <0x53501000 0xa0>;
902 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
905 dma-names = "tx", "rx";
909 compatible = "ti,omap4-des";
911 reg = <0x53701000 0xa0>;
912 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
915 dma-names = "tx", "rx";
919 compatible = "ti,omap4-rng";
921 reg = <0x48310000 0x2000>;
922 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
925 mcasp0: mcasp@48038000 {
926 compatible = "ti,am33xx-mcasp-audio";
927 ti,hwmods = "mcasp0";
928 reg = <0x48038000 0x2000>,
929 <0x46000000 0x400000>;
930 reg-names = "mpu", "dat";
931 interrupts = <80>, <81>;
932 interrupt-names = "tx", "rx";
936 dma-names = "tx", "rx";
939 mcasp1: mcasp@4803C000 {
940 compatible = "ti,am33xx-mcasp-audio";
941 ti,hwmods = "mcasp1";
942 reg = <0x4803C000 0x2000>,
943 <0x46400000 0x400000>;
944 reg-names = "mpu", "dat";
945 interrupts = <82>, <83>;
946 interrupt-names = "tx", "rx";
950 dma-names = "tx", "rx";
954 compatible = "ti,am3352-elm";
955 reg = <0x48080000 0x2000>;
956 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
958 clocks = <&l4ls_gclk>;
963 gpmc: gpmc@50000000 {
964 compatible = "ti,am3352-gpmc";
968 clocks = <&l3s_gclk>;
970 reg = <0x50000000 0x2000>;
971 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
973 gpmc,num-waitpins = <2>;
974 #address-cells = <2>;
976 interrupt-controller;
977 #interrupt-cells = <2>;
983 ocp2scp0: ocp2scp@483a8000 {
984 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
985 #address-cells = <1>;
988 ti,hwmods = "ocp2scp0";
990 usb2_phy1: phy@483a8000 {
991 compatible = "ti,am437x-usb2";
992 reg = <0x483a8000 0x8000>;
993 syscon-phy-power = <&scm_conf 0x620>;
994 clocks = <&usb_phy0_always_on_clk32k>,
995 <&usb_otg_ss0_refclk960m>;
996 clock-names = "wkupclk", "refclk";
1002 ocp2scp1: ocp2scp@483e8000 {
1003 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
1004 #address-cells = <1>;
1007 ti,hwmods = "ocp2scp1";
1009 usb2_phy2: phy@483e8000 {
1010 compatible = "ti,am437x-usb2";
1011 reg = <0x483e8000 0x8000>;
1012 syscon-phy-power = <&scm_conf 0x628>;
1013 clocks = <&usb_phy1_always_on_clk32k>,
1014 <&usb_otg_ss1_refclk960m>;
1015 clock-names = "wkupclk", "refclk";
1017 status = "disabled";
1021 dwc3_1: omap_dwc3@48380000 {
1022 compatible = "ti,am437x-dwc3";
1023 ti,hwmods = "usb_otg_ss0";
1024 reg = <0x48380000 0x10000>;
1025 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
1026 #address-cells = <1>;
1031 usb1: usb@48390000 {
1032 compatible = "synopsys,dwc3";
1033 reg = <0x48390000 0x10000>;
1034 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
1035 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
1037 interrupt-names = "peripheral",
1040 phys = <&usb2_phy1>;
1041 phy-names = "usb2-phy";
1042 maximum-speed = "high-speed";
1044 status = "disabled";
1045 snps,dis_u3_susphy_quirk;
1046 snps,dis_u2_susphy_quirk;
1050 dwc3_2: omap_dwc3@483c0000 {
1051 compatible = "ti,am437x-dwc3";
1052 ti,hwmods = "usb_otg_ss1";
1053 reg = <0x483c0000 0x10000>;
1054 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
1055 #address-cells = <1>;
1060 usb2: usb@483d0000 {
1061 compatible = "synopsys,dwc3";
1062 reg = <0x483d0000 0x10000>;
1063 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
1064 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
1065 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
1066 interrupt-names = "peripheral",
1069 phys = <&usb2_phy2>;
1070 phy-names = "usb2-phy";
1071 maximum-speed = "high-speed";
1073 status = "disabled";
1074 snps,dis_u3_susphy_quirk;
1075 snps,dis_u2_susphy_quirk;
1079 qspi: qspi@47900000 {
1080 compatible = "ti,am4372-qspi";
1081 reg = <0x47900000 0x100>,
1082 <0x30000000 0x4000000>;
1083 reg-names = "qspi_base", "qspi_mmap";
1084 #address-cells = <1>;
1087 interrupts = <0 138 0x4>;
1089 status = "disabled";
1093 compatible = "ti,am4372-hdq";
1094 reg = <0x48347000 0x1000>;
1095 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
1096 clocks = <&func_12m_clk>;
1097 clock-names = "fck";
1098 ti,hwmods = "hdq1w";
1099 status = "disabled";
1103 compatible = "ti,omap3-dss";
1104 reg = <0x4832a000 0x200>;
1105 status = "disabled";
1106 ti,hwmods = "dss_core";
1107 clocks = <&disp_clk>;
1108 clock-names = "fck";
1109 #address-cells = <1>;
1113 dispc: dispc@4832a400 {
1114 compatible = "ti,omap3-dispc";
1115 reg = <0x4832a400 0x400>;
1116 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1117 ti,hwmods = "dss_dispc";
1118 clocks = <&disp_clk>;
1119 clock-names = "fck";
1122 rfbi: rfbi@4832a800 {
1123 compatible = "ti,omap3-rfbi";
1124 reg = <0x4832a800 0x100>;
1125 ti,hwmods = "dss_rfbi";
1126 clocks = <&disp_clk>;
1127 clock-names = "fck";
1128 status = "disabled";
1132 ocmcram: ocmcram@40300000 {
1133 compatible = "mmio-sram";
1134 reg = <0x40300000 0x40000>; /* 256k */
1137 dcan0: can@481cc000 {
1138 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1139 ti,hwmods = "d_can0";
1140 clocks = <&dcan0_fck>;
1141 clock-names = "fck";
1142 reg = <0x481cc000 0x2000>;
1143 syscon-raminit = <&scm_conf 0x644 0>;
1144 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1145 status = "disabled";
1148 dcan1: can@481d0000 {
1149 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1150 ti,hwmods = "d_can1";
1151 clocks = <&dcan1_fck>;
1152 clock-names = "fck";
1153 reg = <0x481d0000 0x2000>;
1154 syscon-raminit = <&scm_conf 0x644 1>;
1155 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1156 status = "disabled";
1159 vpfe0: vpfe@48326000 {
1160 compatible = "ti,am437x-vpfe";
1161 reg = <0x48326000 0x2000>;
1162 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
1163 ti,hwmods = "vpfe0";
1164 status = "disabled";
1167 vpfe1: vpfe@48328000 {
1168 compatible = "ti,am437x-vpfe";
1169 reg = <0x48328000 0x2000>;
1170 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
1171 ti,hwmods = "vpfe1";
1172 status = "disabled";
1177 /include/ "am43xx-clocks.dtsi"