arch/arm/boot/dts/am335x-boneblack-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
   4  */
   5
   6 #include <dt-bindings/display/tda998x.h>
   7 #include <dt-bindings/interrupt-controller/irq.h>
   8
   9 &ldo3_reg {
  10         regulator-min-microvolt = <1800000>;
  11         regulator-max-microvolt = <1800000>;
  12         regulator-always-on;
  13 };
  14
  15 &mmc1 {
  16         vmmc-supply = <&vmmcsd_fixed>;
  17 };
  18
  19 &mmc2 {
  20         vmmc-supply = <&vmmcsd_fixed>;
  21         pinctrl-names = "default";
  22         pinctrl-0 = <&emmc_pins>;
  23         bus-width = <8>;
  24         status = "okay";
  25 };
  26
  27 &am33xx_pinmux {
  28         nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
  29                 pinctrl-single,pins = <
  30                         AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
  31                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
  32                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
  33                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
  34                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
  35                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
  36                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
  37                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
  38                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
  39                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
  40                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
  41                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
  42                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
  43                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
  44                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
  45                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
  46                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
  47                         AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  48                         AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  49                         AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  50                         AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  51                 >;
  52         };
  53
  54         nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
  55                 pinctrl-single,pins = <
  56                         AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
  57                 >;
  58         };
  59
  60         mcasp0_pins: mcasp0_pins {
  61                 pinctrl-single,pins = <
  62                         AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
  63                         AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
  64                         AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0)
  65                         AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  66                         AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
  67                 >;
  68         };
  69 };
  70
  71 &lcdc {
  72         status = "okay";
  73
  74         /* If you want to get 24 bit RGB and 16 BGR mode instead of
  75          * current 16 bit RGB and 24 BGR modes, set the propety
  76          * below to "crossed" and uncomment the video-ports -property
  77          * in tda19988 node.
  78          */
  79         blue-and-red-wiring = "straight";
  80
  81         port {
  82                 lcdc_0: endpoint@0 {
  83                         remote-endpoint = <&hdmi_0>;
  84                 };
  85         };
  86 };
  87
  88 &i2c0 {
  89         tda19988: tda19988@70 {
  90                 compatible = "nxp,tda998x";
  91                 reg = <0x70>;
  92                 nxp,calib-gpios = <&gpio1 25 0>;
  93                 interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>;
  94
  95                 pinctrl-names = "default", "off";
  96                 pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
  97                 pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
  98
  99                 /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
 100                 /* video-ports = <0x234501>; */
 101
 102                 #sound-dai-cells = <0>;
 103                 audio-ports = < TDA998x_I2S     0x03>;
 104
 105                 ports {
 106                         port@0 {
 107                                 hdmi_0: endpoint@0 {
 108                                         remote-endpoint = <&lcdc_0>;
 109                                 };
 110                         };
 111                 };
 112         };
 113 };
 114
 115 &rtc {
 116         system-power-controller;
 117 };
 118
 119 &mcasp0 {
 120         #sound-dai-cells = <0>;
 121         pinctrl-names = "default";
 122         pinctrl-0 = <&mcasp0_pins>;
 123         status = "okay";
 124         op-mode = <0>;  /* MCASP_IIS_MODE */
 125         tdm-slots = <2>;
 126         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
 127                         0 0 1 0
 128                 >;
 129         tx-num-evt = <32>;
 130         rx-num-evt = <32>;
 131 };
 132
 133 / {
 134         clk_mcasp0_fixed: clk_mcasp0_fixed {
 135                 #clock-cells = <0>;
 136                 compatible = "fixed-clock";
 137                 clock-frequency = <24576000>;
 138         };
 139
 140         clk_mcasp0: clk_mcasp0 {
 141                 #clock-cells = <0>;
 142                 compatible = "gpio-gate-clock";
 143                 clocks = <&clk_mcasp0_fixed>;
 144                 enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
 145         };
 146
 147         sound {
 148                 compatible = "simple-audio-card";
 149                 simple-audio-card,name = "TI BeagleBone Black";
 150                 simple-audio-card,format = "i2s";
 151                 simple-audio-card,bitclock-master = <&dailink0_master>;
 152                 simple-audio-card,frame-master = <&dailink0_master>;
 153
 154                 dailink0_master: simple-audio-card,cpu {
 155                         sound-dai = <&mcasp0>;
 156                         clocks = <&clk_mcasp0>;
 157                 };
 158
 159                 simple-audio-card,codec {
 160                         sound-dai = <&tda19988>;
 161                 };
 162         };
 163 };