Merge remote-tracking branches 'spi/fix/dw', 'spi/fix/lantiq' and 'spi/fix/pl022...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / am335x-bone-common.dtsi
1 /*
2  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8
9 / {
10         cpus {
11                 cpu@0 {
12                         cpu0-supply = <&dcdc2_reg>;
13                 };
14         };
15
16         memory@80000000 {
17                 device_type = "memory";
18                 reg = <0x80000000 0x10000000>; /* 256 MB */
19         };
20
21         chosen {
22                 stdout-path = &uart0;
23         };
24
25         leds {
26                 pinctrl-names = "default";
27                 pinctrl-0 = <&user_leds_s0>;
28
29                 compatible = "gpio-leds";
30
31                 led2 {
32                         label = "beaglebone:green:heartbeat";
33                         gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
34                         linux,default-trigger = "heartbeat";
35                         default-state = "off";
36                 };
37
38                 led3 {
39                         label = "beaglebone:green:mmc0";
40                         gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
41                         linux,default-trigger = "mmc0";
42                         default-state = "off";
43                 };
44
45                 led4 {
46                         label = "beaglebone:green:usr2";
47                         gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
48                         linux,default-trigger = "cpu0";
49                         default-state = "off";
50                 };
51
52                 led5 {
53                         label = "beaglebone:green:usr3";
54                         gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
55                         linux,default-trigger = "mmc1";
56                         default-state = "off";
57                 };
58         };
59
60         vmmcsd_fixed: fixedregulator0 {
61                 compatible = "regulator-fixed";
62                 regulator-name = "vmmcsd_fixed";
63                 regulator-min-microvolt = <3300000>;
64                 regulator-max-microvolt = <3300000>;
65         };
66 };
67
68 &am33xx_pinmux {
69         pinctrl-names = "default";
70         pinctrl-0 = <&clkout2_pin>;
71
72         user_leds_s0: user_leds_s0 {
73                 pinctrl-single,pins = <
74                         AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a5.gpio1_21 */
75                         AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_a6.gpio1_22 */
76                         AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a7.gpio1_23 */
77                         AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_a8.gpio1_24 */
78                 >;
79         };
80
81         i2c0_pins: pinmux_i2c0_pins {
82                 pinctrl-single,pins = <
83                         AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
84                         AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
85                 >;
86         };
87
88         i2c2_pins: pinmux_i2c2_pins {
89                 pinctrl-single,pins = <
90                         AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3)       /* uart1_ctsn.i2c2_sda */
91                         AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3)       /* uart1_rtsn.i2c2_scl */
92                 >;
93         };
94
95         uart0_pins: pinmux_uart0_pins {
96                 pinctrl-single,pins = <
97                         AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
98                         AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
99                 >;
100         };
101
102         clkout2_pin: pinmux_clkout2_pin {
103                 pinctrl-single,pins = <
104                         AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr1.clkout2 */
105                 >;
106         };
107
108         cpsw_default: cpsw_default {
109                 pinctrl-single,pins = <
110                         /* Slave 1 */
111                         AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxerr.mii1_rxerr */
112                         AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txen.mii1_txen */
113                         AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxdv.mii1_rxdv */
114                         AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd3.mii1_txd3 */
115                         AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd2.mii1_txd2 */
116                         AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd1.mii1_txd1 */
117                         AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd0.mii1_txd0 */
118                         AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_txclk.mii1_txclk */
119                         AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxclk.mii1_rxclk */
120                         AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd3.mii1_rxd3 */
121                         AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd2.mii1_rxd2 */
122                         AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd1.mii1_rxd1 */
123                         AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd0.mii1_rxd0 */
124                 >;
125         };
126
127         cpsw_sleep: cpsw_sleep {
128                 pinctrl-single,pins = <
129                         /* Slave 1 reset value */
130                         AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
131                         AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
132                         AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
133                         AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
134                         AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
135                         AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
136                         AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
137                         AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
138                         AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
139                         AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
140                         AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
141                         AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
142                         AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
143                 >;
144         };
145
146         davinci_mdio_default: davinci_mdio_default {
147                 pinctrl-single,pins = <
148                         /* MDIO */
149                         AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
150                         AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
151                 >;
152         };
153
154         davinci_mdio_sleep: davinci_mdio_sleep {
155                 pinctrl-single,pins = <
156                         /* MDIO reset value */
157                         AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
158                         AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
159                 >;
160         };
161
162         mmc1_pins: pinmux_mmc1_pins {
163                 pinctrl-single,pins = <
164                         AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
165                 >;
166         };
167
168         emmc_pins: pinmux_emmc_pins {
169                 pinctrl-single,pins = <
170                         AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
171                         AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
172                         AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
173                         AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
174                         AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
175                         AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
176                         AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
177                         AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
178                         AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
179                         AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
180                 >;
181         };
182 };
183
184 &uart0 {
185         pinctrl-names = "default";
186         pinctrl-0 = <&uart0_pins>;
187
188         status = "okay";
189 };
190
191 &usb {
192         status = "okay";
193 };
194
195 &usb_ctrl_mod {
196         status = "okay";
197 };
198
199 &usb0_phy {
200         status = "okay";
201 };
202
203 &usb1_phy {
204         status = "okay";
205 };
206
207 &usb0 {
208         status = "okay";
209         dr_mode = "peripheral";
210         interrupts-extended = <&intc 18 &tps 0>;
211         interrupt-names = "mc", "vbus";
212 };
213
214 &usb1 {
215         status = "okay";
216         dr_mode = "host";
217 };
218
219 &cppi41dma  {
220         status = "okay";
221 };
222
223 &i2c0 {
224         pinctrl-names = "default";
225         pinctrl-0 = <&i2c0_pins>;
226
227         status = "okay";
228         clock-frequency = <400000>;
229
230         tps: tps@24 {
231                 reg = <0x24>;
232         };
233
234         baseboard_eeprom: baseboard_eeprom@50 {
235                 compatible = "at,24c256";
236                 reg = <0x50>;
237
238                 #address-cells = <1>;
239                 #size-cells = <1>;
240                 baseboard_data: baseboard_data@0 {
241                         reg = <0 0x100>;
242                 };
243         };
244 };
245
246 &i2c2 {
247         pinctrl-names = "default";
248         pinctrl-0 = <&i2c2_pins>;
249
250         status = "okay";
251         clock-frequency = <100000>;
252
253         cape_eeprom0: cape_eeprom0@54 {
254                 compatible = "at,24c256";
255                 reg = <0x54>;
256                 #address-cells = <1>;
257                 #size-cells = <1>;
258                 cape0_data: cape_data@0 {
259                         reg = <0 0x100>;
260                 };
261         };
262
263         cape_eeprom1: cape_eeprom1@55 {
264                 compatible = "at,24c256";
265                 reg = <0x55>;
266                 #address-cells = <1>;
267                 #size-cells = <1>;
268                 cape1_data: cape_data@0 {
269                         reg = <0 0x100>;
270                 };
271         };
272
273         cape_eeprom2: cape_eeprom2@56 {
274                 compatible = "at,24c256";
275                 reg = <0x56>;
276                 #address-cells = <1>;
277                 #size-cells = <1>;
278                 cape2_data: cape_data@0 {
279                         reg = <0 0x100>;
280                 };
281         };
282
283         cape_eeprom3: cape_eeprom3@57 {
284                 compatible = "at,24c256";
285                 reg = <0x57>;
286                 #address-cells = <1>;
287                 #size-cells = <1>;
288                 cape3_data: cape_data@0 {
289                         reg = <0 0x100>;
290                 };
291         };
292 };
293
294
295 /include/ "tps65217.dtsi"
296
297 &tps {
298         /*
299          * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
300          * mode") at poweroff.  Most BeagleBone versions do not support RTC-only
301          * mode and risk hardware damage if this mode is entered.
302          *
303          * For details, see linux-omap mailing list May 2015 thread
304          *      [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
305          * In particular, messages:
306          *      http://www.spinics.net/lists/linux-omap/msg118585.html
307          *      http://www.spinics.net/lists/linux-omap/msg118615.html
308          *
309          * You can override this later with
310          *      &tps {  /delete-property/ ti,pmic-shutdown-controller;  }
311          * if you want to use RTC-only mode and made sure you are not affected
312          * by the hardware problems. (Tip: double-check by performing a current
313          * measurement after shutdown: it should be less than 1 mA.)
314          */
315
316         interrupts = <7>; /* NMI */
317         interrupt-parent = <&intc>;
318
319         ti,pmic-shutdown-controller;
320
321         charger {
322                 interrupts = <0>, <1>;
323                 interrupt-names = "USB", "AC";
324                 status = "okay";
325         };
326
327         pwrbutton {
328                 interrupts = <2>;
329                 status = "okay";
330         };
331
332         regulators {
333                 dcdc1_reg: regulator@0 {
334                         regulator-name = "vdds_dpr";
335                         regulator-always-on;
336                 };
337
338                 dcdc2_reg: regulator@1 {
339                         /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
340                         regulator-name = "vdd_mpu";
341                         regulator-min-microvolt = <925000>;
342                         regulator-max-microvolt = <1351500>;
343                         regulator-boot-on;
344                         regulator-always-on;
345                 };
346
347                 dcdc3_reg: regulator@2 {
348                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
349                         regulator-name = "vdd_core";
350                         regulator-min-microvolt = <925000>;
351                         regulator-max-microvolt = <1150000>;
352                         regulator-boot-on;
353                         regulator-always-on;
354                 };
355
356                 ldo1_reg: regulator@3 {
357                         regulator-name = "vio,vrtc,vdds";
358                         regulator-always-on;
359                 };
360
361                 ldo2_reg: regulator@4 {
362                         regulator-name = "vdd_3v3aux";
363                         regulator-always-on;
364                 };
365
366                 ldo3_reg: regulator@5 {
367                         regulator-name = "vdd_1v8";
368                         regulator-always-on;
369                 };
370
371                 ldo4_reg: regulator@6 {
372                         regulator-name = "vdd_3v3a";
373                         regulator-always-on;
374                 };
375         };
376 };
377
378 &cpsw_emac0 {
379         phy_id = <&davinci_mdio>, <0>;
380         phy-mode = "mii";
381 };
382
383 &mac {
384         slaves = <1>;
385         pinctrl-names = "default", "sleep";
386         pinctrl-0 = <&cpsw_default>;
387         pinctrl-1 = <&cpsw_sleep>;
388         status = "okay";
389 };
390
391 &davinci_mdio {
392         pinctrl-names = "default", "sleep";
393         pinctrl-0 = <&davinci_mdio_default>;
394         pinctrl-1 = <&davinci_mdio_sleep>;
395         status = "okay";
396 };
397
398 &mmc1 {
399         status = "okay";
400         bus-width = <0x4>;
401         pinctrl-names = "default";
402         pinctrl-0 = <&mmc1_pins>;
403         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
404 };
405
406 &aes {
407         status = "okay";
408 };
409
410 &sham {
411         status = "okay";
412 };
413
414 &rtc {
415         clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
416         clock-names = "ext-clk", "int-clk";
417 };