arch/arm/boot/dts/am335x-bone-common.dtsi

   1 /*
   2  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 / {
  10         cpus {
  11                 cpu@0 {
  12                         cpu0-supply = <&dcdc2_reg>;
  13                 };
  14         };
  15
  16         memory@80000000 {
  17                 device_type = "memory";
  18                 reg = <0x80000000 0x10000000>; /* 256 MB */
  19         };
  20
  21         chosen {
  22                 stdout-path = &uart0;
  23         };
  24
  25         leds {
  26                 pinctrl-names = "default";
  27                 pinctrl-0 = <&user_leds_s0>;
  28
  29                 compatible = "gpio-leds";
  30
  31                 led2 {
  32                         label = "beaglebone:green:heartbeat";
  33                         gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
  34                         linux,default-trigger = "heartbeat";
  35                         default-state = "off";
  36                 };
  37
  38                 led3 {
  39                         label = "beaglebone:green:mmc0";
  40                         gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
  41                         linux,default-trigger = "mmc0";
  42                         default-state = "off";
  43                 };
  44
  45                 led4 {
  46                         label = "beaglebone:green:usr2";
  47                         gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
  48                         linux,default-trigger = "cpu0";
  49                         default-state = "off";
  50                 };
  51
  52                 led5 {
  53                         label = "beaglebone:green:usr3";
  54                         gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
  55                         linux,default-trigger = "mmc1";
  56                         default-state = "off";
  57                 };
  58         };
  59
  60         vmmcsd_fixed: fixedregulator0 {
  61                 compatible = "regulator-fixed";
  62                 regulator-name = "vmmcsd_fixed";
  63                 regulator-min-microvolt = <3300000>;
  64                 regulator-max-microvolt = <3300000>;
  65         };
  66 };
  67
  68 &am33xx_pinmux {
  69         pinctrl-names = "default";
  70         pinctrl-0 = <&clkout2_pin>;
  71
  72         user_leds_s0: user_leds_s0 {
  73                 pinctrl-single,pins = <
  74                         AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a5.gpio1_21 */
  75                         AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_a6.gpio1_22 */
  76                         AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a7.gpio1_23 */
  77                         AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_a8.gpio1_24 */
  78                 >;
  79         };
  80
  81         i2c0_pins: pinmux_i2c0_pins {
  82                 pinctrl-single,pins = <
  83                         AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
  84                         AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
  85                 >;
  86         };
  87
  88         i2c2_pins: pinmux_i2c2_pins {
  89                 pinctrl-single,pins = <
  90                         AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3)       /* uart1_ctsn.i2c2_sda */
  91                         AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3)       /* uart1_rtsn.i2c2_scl */
  92                 >;
  93         };
  94
  95         uart0_pins: pinmux_uart0_pins {
  96                 pinctrl-single,pins = <
  97                         AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
  98                         AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
  99                 >;
 100         };
 101
 102         clkout2_pin: pinmux_clkout2_pin {
 103                 pinctrl-single,pins = <
 104                         AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr1.clkout2 */
 105                 >;
 106         };
 107
 108         cpsw_default: cpsw_default {
 109                 pinctrl-single,pins = <
 110                         /* Slave 1 */
 111                         AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxerr.mii1_rxerr */
 112                         AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txen.mii1_txen */
 113                         AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxdv.mii1_rxdv */
 114                         AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd3.mii1_txd3 */
 115                         AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd2.mii1_txd2 */
 116                         AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd1.mii1_txd1 */
 117                         AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd0.mii1_txd0 */
 118                         AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_txclk.mii1_txclk */
 119                         AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxclk.mii1_rxclk */
 120                         AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd3.mii1_rxd3 */
 121                         AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd2.mii1_rxd2 */
 122                         AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd1.mii1_rxd1 */
 123                         AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd0.mii1_rxd0 */
 124                 >;
 125         };
 126
 127         cpsw_sleep: cpsw_sleep {
 128                 pinctrl-single,pins = <
 129                         /* Slave 1 reset value */
 130                         AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
 131                         AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
 132                         AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
 133                         AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 134                         AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
 135                         AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
 136                         AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
 137                         AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 138                         AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
 139                         AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
 140                         AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
 141                         AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 142                         AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
 143                 >;
 144         };
 145
 146         davinci_mdio_default: davinci_mdio_default {
 147                 pinctrl-single,pins = <
 148                         /* MDIO */
 149                         AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
 150                         AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
 151                 >;
 152         };
 153
 154         davinci_mdio_sleep: davinci_mdio_sleep {
 155                 pinctrl-single,pins = <
 156                         /* MDIO reset value */
 157                         AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
 158                         AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 159                 >;
 160         };
 161
 162         mmc1_pins: pinmux_mmc1_pins {
 163                 pinctrl-single,pins = <
 164                         AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)              /* spio0_cs1.gpio0_6 */
 165                         AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat0.mmc0_dat0 */
 166                         AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat1.mmc0_dat1 */
 167                         AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat2.mmc0_dat2 */
 168                         AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat3.mmc0_dat3 */
 169                         AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_cmd.mmc0_cmd */
 170                         AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_clk.mmc0_clk */
 171                 >;
 172         };
 173
 174         emmc_pins: pinmux_emmc_pins {
 175                 pinctrl-single,pins = <
 176                         AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
 177                         AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
 178                         AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
 179                         AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
 180                         AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
 181                         AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
 182                         AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
 183                         AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
 184                         AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
 185                         AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
 186                 >;
 187         };
 188 };
 189
 190 &uart0 {
 191         pinctrl-names = "default";
 192         pinctrl-0 = <&uart0_pins>;
 193
 194         status = "okay";
 195 };
 196
 197 &usb {
 198         status = "okay";
 199 };
 200
 201 &usb_ctrl_mod {
 202         status = "okay";
 203 };
 204
 205 &usb0_phy {
 206         status = "okay";
 207 };
 208
 209 &usb1_phy {
 210         status = "okay";
 211 };
 212
 213 &usb0 {
 214         status = "okay";
 215         dr_mode = "peripheral";
 216         interrupts-extended = <&intc 18 &tps 0>;
 217         interrupt-names = "mc", "vbus";
 218 };
 219
 220 &usb1 {
 221         status = "okay";
 222         dr_mode = "host";
 223 };
 224
 225 &cppi41dma  {
 226         status = "okay";
 227 };
 228
 229 &i2c0 {
 230         pinctrl-names = "default";
 231         pinctrl-0 = <&i2c0_pins>;
 232
 233         status = "okay";
 234         clock-frequency = <400000>;
 235
 236         tps: tps@24 {
 237                 reg = <0x24>;
 238         };
 239
 240         baseboard_eeprom: baseboard_eeprom@50 {
 241                 compatible = "atmel,24c256";
 242                 reg = <0x50>;
 243
 244                 #address-cells = <1>;
 245                 #size-cells = <1>;
 246                 baseboard_data: baseboard_data@0 {
 247                         reg = <0 0x100>;
 248                 };
 249         };
 250 };
 251
 252 &i2c2 {
 253         pinctrl-names = "default";
 254         pinctrl-0 = <&i2c2_pins>;
 255
 256         status = "okay";
 257         clock-frequency = <100000>;
 258
 259         cape_eeprom0: cape_eeprom0@54 {
 260                 compatible = "atmel,24c256";
 261                 reg = <0x54>;
 262                 #address-cells = <1>;
 263                 #size-cells = <1>;
 264                 cape0_data: cape_data@0 {
 265                         reg = <0 0x100>;
 266                 };
 267         };
 268
 269         cape_eeprom1: cape_eeprom1@55 {
 270                 compatible = "atmel,24c256";
 271                 reg = <0x55>;
 272                 #address-cells = <1>;
 273                 #size-cells = <1>;
 274                 cape1_data: cape_data@0 {
 275                         reg = <0 0x100>;
 276                 };
 277         };
 278
 279         cape_eeprom2: cape_eeprom2@56 {
 280                 compatible = "atmel,24c256";
 281                 reg = <0x56>;
 282                 #address-cells = <1>;
 283                 #size-cells = <1>;
 284                 cape2_data: cape_data@0 {
 285                         reg = <0 0x100>;
 286                 };
 287         };
 288
 289         cape_eeprom3: cape_eeprom3@57 {
 290                 compatible = "atmel,24c256";
 291                 reg = <0x57>;
 292                 #address-cells = <1>;
 293                 #size-cells = <1>;
 294                 cape3_data: cape_data@0 {
 295                         reg = <0 0x100>;
 296                 };
 297         };
 298 };
 299
 300
 301 /include/ "tps65217.dtsi"
 302
 303 &tps {
 304         /*
 305          * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
 306          * mode") at poweroff.  Most BeagleBone versions do not support RTC-only
 307          * mode and risk hardware damage if this mode is entered.
 308          *
 309          * For details, see linux-omap mailing list May 2015 thread
 310          *      [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
 311          * In particular, messages:
 312          *      http://www.spinics.net/lists/linux-omap/msg118585.html
 313          *      http://www.spinics.net/lists/linux-omap/msg118615.html
 314          *
 315          * You can override this later with
 316          *      &tps {  /delete-property/ ti,pmic-shutdown-controller;  }
 317          * if you want to use RTC-only mode and made sure you are not affected
 318          * by the hardware problems. (Tip: double-check by performing a current
 319          * measurement after shutdown: it should be less than 1 mA.)
 320          */
 321
 322         interrupts = <7>; /* NMI */
 323         interrupt-parent = <&intc>;
 324
 325         ti,pmic-shutdown-controller;
 326
 327         charger {
 328                 status = "okay";
 329         };
 330
 331         pwrbutton {
 332                 status = "okay";
 333         };
 334
 335         regulators {
 336                 dcdc1_reg: regulator@0 {
 337                         regulator-name = "vdds_dpr";
 338                         regulator-always-on;
 339                 };
 340
 341                 dcdc2_reg: regulator@1 {
 342                         /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
 343                         regulator-name = "vdd_mpu";
 344                         regulator-min-microvolt = <925000>;
 345                         regulator-max-microvolt = <1351500>;
 346                         regulator-boot-on;
 347                         regulator-always-on;
 348                 };
 349
 350                 dcdc3_reg: regulator@2 {
 351                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
 352                         regulator-name = "vdd_core";
 353                         regulator-min-microvolt = <925000>;
 354                         regulator-max-microvolt = <1150000>;
 355                         regulator-boot-on;
 356                         regulator-always-on;
 357                 };
 358
 359                 ldo1_reg: regulator@3 {
 360                         regulator-name = "vio,vrtc,vdds";
 361                         regulator-always-on;
 362                 };
 363
 364                 ldo2_reg: regulator@4 {
 365                         regulator-name = "vdd_3v3aux";
 366                         regulator-always-on;
 367                 };
 368
 369                 ldo3_reg: regulator@5 {
 370                         regulator-name = "vdd_1v8";
 371                         regulator-always-on;
 372                 };
 373
 374                 ldo4_reg: regulator@6 {
 375                         regulator-name = "vdd_3v3a";
 376                         regulator-always-on;
 377                 };
 378         };
 379 };
 380
 381 &cpsw_emac0 {
 382         phy-handle = <&ethphy0>;
 383         phy-mode = "mii";
 384 };
 385
 386 &mac {
 387         slaves = <1>;
 388         pinctrl-names = "default", "sleep";
 389         pinctrl-0 = <&cpsw_default>;
 390         pinctrl-1 = <&cpsw_sleep>;
 391         status = "okay";
 392 };
 393
 394 &davinci_mdio {
 395         pinctrl-names = "default", "sleep";
 396         pinctrl-0 = <&davinci_mdio_default>;
 397         pinctrl-1 = <&davinci_mdio_sleep>;
 398         status = "okay";
 399
 400         ethphy0: ethernet-phy@0 {
 401                 reg = <0>;
 402         };
 403 };
 404
 405 &mmc1 {
 406         status = "okay";
 407         bus-width = <0x4>;
 408         pinctrl-names = "default";
 409         pinctrl-0 = <&mmc1_pins>;
 410         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 411 };
 412
 413 &aes {
 414         status = "okay";
 415 };
 416
 417 &sham {
 418         status = "okay";
 419 };
 420
 421 &rtc {
 422         clocks = <&clk_32768_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
 423         clock-names = "ext-clk", "int-clk";
 424 };