2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/seq_file.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/clk.h>
14 #include <linux/clk-provider.h>
15 #include <linux/clocksource.h>
16 #include <linux/console.h>
17 #include <linux/module.h>
18 #include <linux/cpu.h>
19 #include <linux/of_fdt.h>
21 #include <linux/cache.h>
22 #include <uapi/linux/mount.h>
23 #include <asm/sections.h>
24 #include <asm/arcregs.h>
26 #include <asm/setup.h>
29 #include <asm/unwind.h>
30 #include <asm/mach_desc.h>
33 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
35 unsigned int intr_to_DE_cnt;
37 /* Part of U-boot ABI: see head.S */
38 int __initdata uboot_tag;
39 char __initdata *uboot_arg;
41 const struct machine_desc *machine_desc;
43 struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
45 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
47 static const struct id_to_str arc_cpu_rel[] = {
48 #ifdef CONFIG_ISA_ARCOMPACT
60 static const struct id_to_str arc_cpu_nm[] = {
61 #ifdef CONFIG_ISA_ARCOMPACT
63 { 0x30, "ARC 770" }, /* 750 identified seperately */
72 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
74 if (is_isa_arcompact()) {
75 struct bcr_iccm_arcompact iccm;
76 struct bcr_dccm_arcompact dccm;
78 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
80 cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
81 cpu->iccm.base_addr = iccm.base << 16;
84 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
87 cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
89 base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
90 cpu->dccm.base_addr = base & ~0xF;
93 struct bcr_iccm_arcv2 iccm;
94 struct bcr_dccm_arcv2 dccm;
97 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
99 cpu->iccm.sz = 256 << iccm.sz00; /* 512B to 16M */
100 if (iccm.sz00 == 0xF && iccm.sz01 > 0)
101 cpu->iccm.sz <<= iccm.sz01;
103 region = read_aux_reg(ARC_REG_AUX_ICCM);
104 cpu->iccm.base_addr = region & 0xF0000000;
107 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
109 cpu->dccm.sz = 256 << dccm.sz0;
110 if (dccm.sz0 == 0xF && dccm.sz1 > 0)
111 cpu->dccm.sz <<= dccm.sz1;
113 region = read_aux_reg(ARC_REG_AUX_DCCM);
114 cpu->dccm.base_addr = region & 0xF0000000;
119 static void read_arc_build_cfg_regs(void)
121 struct bcr_timer timer;
122 struct bcr_generic bcr;
123 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
124 const struct id_to_str *tbl;
125 struct bcr_isa_arcv2 isa;
126 struct bcr_actionpoint ap;
130 READ_BCR(AUX_IDENTITY, cpu->core);
132 for (tbl = &arc_cpu_rel[0]; tbl->id != 0; tbl++) {
133 if (cpu->core.family == tbl->id) {
134 cpu->details = tbl->str;
139 for (tbl = &arc_cpu_nm[0]; tbl->id != 0; tbl++) {
140 if ((cpu->core.family & 0xF4) == tbl->id)
143 cpu->name = tbl->str;
145 READ_BCR(ARC_REG_TIMERS_BCR, timer);
146 cpu->extn.timer0 = timer.t0;
147 cpu->extn.timer1 = timer.t1;
148 cpu->extn.rtc = timer.rtc;
150 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
152 READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
154 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
155 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
156 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
157 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
158 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
159 cpu->extn.swape = (cpu->core.family >= 0x34) ? 1 :
160 IS_ENABLED(CONFIG_ARC_HAS_SWAPE);
162 READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
164 /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
165 read_decode_ccm_bcr(cpu);
167 read_decode_mmu_bcr();
168 read_decode_cache_bcr();
170 if (is_isa_arcompact()) {
171 struct bcr_fp_arcompact sp, dp;
172 struct bcr_bpu_arcompact bpu;
174 READ_BCR(ARC_REG_FP_BCR, sp);
175 READ_BCR(ARC_REG_DPFP_BCR, dp);
176 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
177 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
179 READ_BCR(ARC_REG_BPU_BCR, bpu);
180 cpu->bpu.ver = bpu.ver;
181 cpu->bpu.full = bpu.fam ? 1 : 0;
183 cpu->bpu.num_cache = 256 << (bpu.ent - 1);
184 cpu->bpu.num_pred = 256 << (bpu.ent - 1);
187 struct bcr_fp_arcv2 spdp;
188 struct bcr_bpu_arcv2 bpu;
190 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
191 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
192 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
194 READ_BCR(ARC_REG_BPU_BCR, bpu);
195 cpu->bpu.ver = bpu.ver;
196 cpu->bpu.full = bpu.ft;
197 cpu->bpu.num_cache = 256 << bpu.bce;
198 cpu->bpu.num_pred = 2048 << bpu.pte;
199 cpu->bpu.ret_stk = 4 << bpu.rse;
201 if (cpu->core.family >= 0x54) {
202 unsigned int exec_ctrl;
204 READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
205 cpu->extn.dual_enb = !(exec_ctrl & 1);
207 /* dual issue always present for this core */
212 READ_BCR(ARC_REG_AP_BCR, ap);
214 cpu->extn.ap_num = 2 << ap.num;
215 cpu->extn.ap_full = !!ap.min;
218 READ_BCR(ARC_REG_SMART_BCR, bcr);
219 cpu->extn.smart = bcr.ver ? 1 : 0;
221 READ_BCR(ARC_REG_RTT_BCR, bcr);
222 cpu->extn.rtt = bcr.ver ? 1 : 0;
224 READ_BCR(ARC_REG_ISA_CFG_BCR, isa);
226 /* some hacks for lack of feature BCR info in old ARC700 cores */
227 if (is_isa_arcompact()) {
228 if (!isa.ver) /* ISA BCR absent, use Kconfig info */
229 cpu->isa.atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
231 /* ARC700_BUILD only has 2 bits of isa info */
232 struct bcr_generic bcr = *(struct bcr_generic *)&isa;
233 cpu->isa.atomic = bcr.info & 1;
236 cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
238 /* there's no direct way to distinguish 750 vs. 770 */
239 if (unlikely(cpu->core.family < 0x34 || cpu->mmu.ver < 3))
240 cpu->name = "ARC750";
246 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
248 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
249 struct bcr_identity *core = &cpu->core;
250 int i, n = 0, ua = 0;
254 n += scnprintf(buf + n, len - n,
255 "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
256 core->family, core->cpu_id, core->chip_id);
258 n += scnprintf(buf + n, len - n, "processor [%d]\t: %s %s (%s ISA) %s%s%s\n",
259 cpu_id, cpu->name, cpu->details,
260 is_isa_arcompact() ? "ARCompact" : "ARCv2",
261 IS_AVAIL1(cpu->isa.be, "[Big-Endian]"),
262 IS_AVAIL3(cpu->extn.dual, cpu->extn.dual_enb, " Dual-Issue "));
264 n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: ",
265 IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
266 IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
267 IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
268 IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
270 #ifdef __ARC_UNALIGNED__
273 n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s%s",
274 IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
275 IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
276 IS_AVAIL1(cpu->isa.unalign, "unalign "), IS_USED_RUN(ua));
279 n += scnprintf(buf + n, len - n, "\n\t\t: ");
281 if (cpu->extn_mpy.ver) {
282 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
283 n += scnprintf(buf + n, len - n, "mpy ");
285 int opt = 2; /* stock MPY/MPYH */
287 if (cpu->extn_mpy.dsp) /* OPT 7-9 */
288 opt = cpu->extn_mpy.dsp + 6;
290 n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
294 n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
295 IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
296 IS_AVAIL1(cpu->extn.norm, "norm "),
297 IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
298 IS_AVAIL1(cpu->extn.swap, "swap "),
299 IS_AVAIL1(cpu->extn.minmax, "minmax "),
300 IS_AVAIL1(cpu->extn.crc, "crc "),
301 IS_AVAIL2(cpu->extn.swape, "swape", CONFIG_ARC_HAS_SWAPE));
304 n += scnprintf(buf + n, len - n,
305 "BPU\t\t: %s%s match, cache:%d, Predict Table:%d Return stk: %d",
306 IS_AVAIL1(cpu->bpu.full, "full"),
307 IS_AVAIL1(!cpu->bpu.full, "partial"),
308 cpu->bpu.num_cache, cpu->bpu.num_pred, cpu->bpu.ret_stk);
310 if (is_isa_arcv2()) {
313 READ_BCR(ARC_REG_LPB_BUILD, lpb);
316 ctl = read_aux_reg(ARC_REG_LPB_CTRL);
318 n += scnprintf(buf + n, len - n, " Loop Buffer:%d %s",
320 IS_DISABLED_RUN(!ctl));
324 n += scnprintf(buf + n, len - n, "\n");
328 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
331 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
335 n += scnprintf(buf + n, len - n, "Vector Table\t: %#x\n", cpu->vec_base);
337 if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
338 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
339 IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
340 IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
342 if (cpu->extn.ap_num | cpu->extn.smart | cpu->extn.rtt) {
343 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s",
344 IS_AVAIL1(cpu->extn.smart, "smaRT "),
345 IS_AVAIL1(cpu->extn.rtt, "RTT "));
346 if (cpu->extn.ap_num) {
347 n += scnprintf(buf + n, len - n, "ActionPoint %d/%s",
349 cpu->extn.ap_full ? "full":"min");
351 n += scnprintf(buf + n, len - n, "\n");
354 if (cpu->dccm.sz || cpu->iccm.sz)
355 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
356 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
357 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
359 if (is_isa_arcv2()) {
361 /* Error Protection: ECC/Parity */
363 READ_BCR(ARC_REG_ERP_BUILD, erp);
367 READ_BCR(ARC_REG_ERP_CTRL, ctl);
369 /* inverted bits: 0 means enabled */
370 n += scnprintf(buf + n, len - n, "Extn [ECC]\t: %s%s%s%s%s%s\n",
371 IS_AVAIL3(erp.ic, !ctl.dpi, "IC "),
372 IS_AVAIL3(erp.dc, !ctl.dpd, "DC "),
373 IS_AVAIL3(erp.mmu, !ctl.mpd, "MMU "));
377 n += scnprintf(buf + n, len - n, "OS ABI [v%d]\t: %s\n",
378 EF_ARC_OSABI_CURRENT >> 8,
379 EF_ARC_OSABI_CURRENT == EF_ARC_OSABI_V3 ?
380 "no-legacy-syscalls" : "64-bit data any register aligned");
385 static void arc_chk_core_config(void)
387 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
388 int saved = 0, present = 0;
391 if (!cpu->extn.timer0)
392 panic("Timer0 is not present!\n");
394 if (!cpu->extn.timer1)
395 panic("Timer1 is not present!\n");
397 #ifdef CONFIG_ARC_HAS_DCCM
399 * DCCM can be arbit placed in hardware.
400 * Make sure it's placement/sz matches what Linux is built with
402 if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
403 panic("Linux built with incorrect DCCM Base address\n");
405 if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
406 panic("Linux built with incorrect DCCM Size\n");
409 #ifdef CONFIG_ARC_HAS_ICCM
410 if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
411 panic("Linux built with incorrect ICCM Size\n");
415 * FP hardware/software config sanity
416 * -If hardware present, kernel needs to save/restore FPU state
417 * -If not, it will crash trying to save/restore the non-existant regs
420 if (is_isa_arcompact()) {
421 opt_nm = "CONFIG_ARC_FPU_SAVE_RESTORE";
422 saved = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
424 /* only DPDP checked since SP has no arch visible regs */
425 present = cpu->extn.fpu_dp;
427 opt_nm = "CONFIG_ARC_HAS_ACCL_REGS";
428 saved = IS_ENABLED(CONFIG_ARC_HAS_ACCL_REGS);
430 /* Accumulator Low:High pair (r58:59) present if DSP MPY or FPU */
431 present = cpu->extn_mpy.dsp | cpu->extn.fpu_sp | cpu->extn.fpu_dp;
434 if (present && !saved)
435 pr_warn("Enable %s for working apps\n", opt_nm);
436 else if (!present && saved)
437 panic("Disable %s, hardware NOT present\n", opt_nm);
441 * Initialize and setup the processor core
442 * This is called by all the CPUs thus should not do special case stuff
443 * such as only for boot CPU etc
446 void setup_processor(void)
449 int cpu_id = smp_processor_id();
451 read_arc_build_cfg_regs();
454 pr_info("%s", arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
459 pr_info("%s", arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
460 pr_info("%s", arc_platform_smp_cpuinfo());
462 arc_chk_core_config();
465 static inline int is_kernel(unsigned long addr)
467 if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
472 void __init setup_arch(char **cmdline_p)
474 #ifdef CONFIG_ARC_UBOOT_SUPPORT
475 /* make sure that uboot passed pointer to cmdline/dtb is valid */
476 if (uboot_tag && is_kernel((unsigned long)uboot_arg))
477 panic("Invalid uboot arg\n");
479 /* See if u-boot passed an external Device Tree blob */
480 machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
484 /* No, so try the embedded one */
485 machine_desc = setup_machine_fdt(__dtb_start);
487 panic("Embedded DT invalid\n");
490 * If we are here, it is established that @uboot_arg didn't
491 * point to DT blob. Instead if u-boot says it is cmdline,
492 * append to embedded DT cmdline.
493 * setup_machine_fdt() would have populated @boot_command_line
495 if (uboot_tag == 1) {
496 /* Ensure a whitespace between the 2 cmdlines */
497 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
498 strlcat(boot_command_line, uboot_arg,
503 /* Save unparsed command line copy for /proc/cmdline */
504 *cmdline_p = boot_command_line;
506 /* To force early parsing of things like mem=xxx */
509 /* Platform/board specific: e.g. early console registration */
510 if (machine_desc->init_early)
511 machine_desc->init_early();
518 /* copy flat DT out of .init and then unflatten it */
519 unflatten_and_copy_device_tree();
521 /* Can be issue if someone passes cmd line arg "ro"
522 * But that is unlikely so keeping it as it is
524 root_mountflags &= ~MS_RDONLY;
526 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
527 conswitchp = &dummy_con;
534 * Called from start_kernel() - boot CPU only
536 void __init time_init(void)
542 static int __init customize_machine(void)
544 if (machine_desc->init_machine)
545 machine_desc->init_machine();
549 arch_initcall(customize_machine);
551 static int __init init_late_machine(void)
553 if (machine_desc->init_late)
554 machine_desc->init_late();
558 late_initcall(init_late_machine);
560 * Get CPU information for use by the procfs.
563 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
564 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
566 static int show_cpuinfo(struct seq_file *m, void *v)
569 int cpu_id = ptr_to_cpu(v);
570 struct device *cpu_dev = get_cpu_device(cpu_id);
572 unsigned long freq = 0;
574 if (!cpu_online(cpu_id)) {
575 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
579 str = (char *)__get_free_page(GFP_KERNEL);
583 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
585 cpu_clk = clk_get(cpu_dev, NULL);
586 if (IS_ERR(cpu_clk)) {
587 seq_printf(m, "CPU speed \t: Cannot get clock for processor [%d]\n",
590 freq = clk_get_rate(cpu_clk);
593 seq_printf(m, "CPU speed\t: %lu.%02lu Mhz\n",
594 freq / 1000000, (freq / 10000) % 100);
596 seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
597 loops_per_jiffy / (500000 / HZ),
598 (loops_per_jiffy / (5000 / HZ)) % 100);
600 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
601 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
602 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
603 seq_printf(m, arc_platform_smp_cpuinfo());
605 free_page((unsigned long)str);
612 static void *c_start(struct seq_file *m, loff_t *pos)
615 * Callback returns cpu-id to iterator for show routine, NULL to stop.
616 * However since NULL is also a valid cpu-id (0), we use a round-about
617 * way to pass it w/o having to kmalloc/free a 2 byte string.
618 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
620 return *pos < nr_cpu_ids ? cpu_to_ptr(*pos) : NULL;
623 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
626 return c_start(m, pos);
629 static void c_stop(struct seq_file *m, void *v)
633 const struct seq_operations cpuinfo_op = {
640 static DEFINE_PER_CPU(struct cpu, cpu_topology);
642 static int __init topology_init(void)
646 for_each_present_cpu(cpu)
647 register_cpu(&per_cpu(cpu_topology, cpu), cpu);
652 subsys_initcall(topology_init);