2 * linux/arch/alpha/kernel/sys_nautilus.c
4 * Copyright (C) 1995 David A Rusling
5 * Copyright (C) 1998 Richard Henderson
6 * Copyright (C) 1999 Alpha Processor, Inc.,
7 * (David Daniel, Stig Telfer, Soohoon Lee)
9 * Code supporting NAUTILUS systems.
12 * NAUTILUS has the following I/O features:
14 * a) Driven by AMD 751 aka IRONGATE (northbridge):
18 * b) Driven by ALI M1543C (southbridge)
21 * 1 dual drive capable FDD controller
23 * 1 ECP/EPP/SP parallel port
27 #include <linux/kernel.h>
28 #include <linux/types.h>
30 #include <linux/sched.h>
31 #include <linux/pci.h>
32 #include <linux/init.h>
33 #include <linux/reboot.h>
34 #include <linux/bootmem.h>
35 #include <linux/bitops.h>
37 #include <asm/ptrace.h>
40 #include <asm/mmu_context.h>
42 #include <asm/pgtable.h>
43 #include <asm/core_irongate.h>
44 #include <asm/hwrpb.h>
45 #include <asm/tlbflush.h>
51 #include "machvec_impl.h"
55 nautilus_init_irq(void)
57 if (alpha_using_srm) {
58 alpha_mv.device_interrupt = srm_device_interrupt;
62 common_init_isa_dma();
66 nautilus_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
68 /* Preserve the IRQ set up by the console. */
71 /* UP1500: AGP INTA is actually routed to IRQ 5, not IRQ 10 as
72 console reports. Check the device id of AGP bridge to distinguish
73 UP1500 from UP1000/1100. Note: 'pin' is 2 due to bridge swizzle. */
74 if (slot == 1 && pin == 2 &&
75 dev->bus->self && dev->bus->self->device == 0x700f)
77 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
82 nautilus_kill_arch(int mode)
84 struct pci_bus *bus = pci_isa_hose->bus;
89 case LINUX_REBOOT_CMD_RESTART:
90 if (! alpha_using_srm) {
92 pci_bus_read_config_byte(bus, 0x38, 0x43, &t8);
93 pci_bus_write_config_byte(bus, 0x38, 0x43, t8 | 0x80);
100 case LINUX_REBOOT_CMD_POWER_OFF:
102 off = 0x2000; /* SLP_TYPE = 0, SLP_EN = 1 */
103 pci_bus_read_config_dword(bus, 0x88, 0x10, &pmuport);
106 off = 0x3400; /* SLP_TYPE = 5, SLP_EN = 1 */
107 pci_bus_read_config_dword(bus, 0x88, 0xe0, &pmuport);
110 outw(0xffff, pmuport); /* Clear pending events. */
111 outw(off, pmuport + 4);
117 /* Perform analysis of a machine check that arrived from the system (NMI) */
120 naut_sys_machine_check(unsigned long vector, unsigned long la_ptr,
121 struct pt_regs *regs)
123 printk("PC %lx RA %lx\n", regs->pc, regs->r26);
124 irongate_pci_clr_err();
127 /* Machine checks can come from two sources - those on the CPU and those
128 in the system. They are analysed separately but all starts here. */
131 nautilus_machine_check(unsigned long vector, unsigned long la_ptr)
135 /* Now for some analysis. Machine checks fall into two classes --
136 those picked up by the system, and those picked up by the CPU.
137 Add to that the two levels of severity - correctable or not. */
139 if (vector == SCB_Q_SYSMCHK
140 && ((IRONGATE0->dramms & 0x300) == 0x300)) {
141 unsigned long nmi_ctl;
150 /* Write again clears error bits. */
151 IRONGATE0->stat_cmd = IRONGATE0->stat_cmd & ~0x100;
155 /* Write again clears error bits. */
156 IRONGATE0->dramms = IRONGATE0->dramms;
166 if (vector == SCB_Q_SYSERR)
167 mchk_class = "Correctable";
168 else if (vector == SCB_Q_SYSMCHK)
169 mchk_class = "Fatal";
171 ev6_machine_check(vector, la_ptr);
175 printk(KERN_CRIT "NAUTILUS Machine check 0x%lx "
176 "[%s System Machine Check (NMI)]\n",
179 naut_sys_machine_check(vector, la_ptr, get_irq_regs());
181 /* Tell the PALcode to clear the machine check */
187 extern void pcibios_claim_one_bus(struct pci_bus *);
189 static struct resource irongate_io = {
190 .name = "Irongate PCI IO",
191 .flags = IORESOURCE_IO,
193 static struct resource irongate_mem = {
194 .name = "Irongate PCI MEM",
195 .flags = IORESOURCE_MEM,
197 static struct resource busn_resource = {
201 .flags = IORESOURCE_BUS,
205 nautilus_init_pci(void)
207 struct pci_controller *hose = hose_head;
208 struct pci_host_bridge *bridge;
210 struct pci_dev *irongate;
211 unsigned long bus_align, bus_size, pci_mem;
212 unsigned long memtop = max_low_pfn << PAGE_SHIFT;
215 bridge = pci_alloc_host_bridge(0);
219 pci_add_resource(&bridge->windows, &ioport_resource);
220 pci_add_resource(&bridge->windows, &iomem_resource);
221 pci_add_resource(&bridge->windows, &busn_resource);
222 bridge->dev.parent = NULL;
223 bridge->sysdata = hose;
225 bridge->ops = alpha_mv.pci_ops;
226 bridge->swizzle_irq = alpha_mv.pci_swizzle;
227 bridge->map_irq = alpha_mv.pci_map_irq;
229 /* Scan our single hose. */
230 ret = pci_scan_root_bus_bridge(bridge);
232 pci_free_host_bridge(bridge);
236 bus = hose->bus = bridge->bus;
237 pcibios_claim_one_bus(bus);
239 irongate = pci_get_bus_and_slot(0, 0);
240 bus->self = irongate;
241 bus->resource[0] = &irongate_io;
242 bus->resource[1] = &irongate_mem;
244 pci_bus_size_bridges(bus);
247 bus->resource[0]->start = 0;
248 bus->resource[0]->end = 0xffff;
250 /* Set up PCI memory range - limit is hardwired to 0xffffffff,
251 base must be at aligned to 16Mb. */
252 bus_align = bus->resource[1]->start;
253 bus_size = bus->resource[1]->end + 1 - bus_align;
254 if (bus_align < 0x1000000UL)
255 bus_align = 0x1000000UL;
257 pci_mem = (0x100000000UL - bus_size) & -bus_align;
259 bus->resource[1]->start = pci_mem;
260 bus->resource[1]->end = 0xffffffffUL;
261 if (request_resource(&iomem_resource, bus->resource[1]) < 0)
262 printk(KERN_ERR "Failed to request MEM on hose 0\n");
264 if (pci_mem < memtop)
266 if (memtop > alpha_mv.min_mem_address) {
267 free_reserved_area(__va(alpha_mv.min_mem_address),
268 __va(memtop), -1, NULL);
269 printk("nautilus_init_pci: %ldk freed\n",
270 (memtop - alpha_mv.min_mem_address) >> 10);
273 if ((IRONGATE0->dev_vendor >> 16) > 0x7006) /* Albacore? */
274 IRONGATE0->pci_mem = pci_mem;
276 pci_bus_assign_resources(bus);
278 /* pci_common_swizzle() relies on bus->self being NULL
279 for the root bus, so just clear it. */
281 pci_bus_add_devices(bus);
288 struct alpha_machine_vector nautilus_mv __initmv = {
289 .vector_name = "Nautilus",
293 .machine_check = nautilus_machine_check,
294 .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
295 .min_io_address = DEFAULT_IO_BASE,
296 .min_mem_address = IRONGATE_DEFAULT_MEM_BASE,
299 .device_interrupt = isa_device_interrupt,
301 .init_arch = irongate_init_arch,
302 .init_irq = nautilus_init_irq,
303 .init_rtc = common_init_rtc,
304 .init_pci = nautilus_init_pci,
305 .kill_arch = nautilus_kill_arch,
306 .pci_map_irq = nautilus_map_irq,
307 .pci_swizzle = common_swizzle,