3 The device node for Mediatek SOC USB3.0 host controller
5 There are two scenarios: the first one only supports xHCI driver;
6 the second one supports dual-role mode, and the host is based on xHCI
7 driver. Take account of backward compatibility, we divide bindings
10 1st: only supports xHCI driver
11 ------------------------------------------------------------------------
14 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
15 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
16 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
18 - "mediatek,mt8173-xhci"
19 - reg : specifies physical base address and size of the registers
20 - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
21 - interrupts : interrupt used by the controller
22 - power-domains : a phandle to USB power domain node to control USB's
24 - vusb33-supply : regulator of USB avdd3.3v
26 - clocks : a list of phandle + clock-specifier pairs, one for each
28 - clock-names : must contain
29 "sys_ck": controller clock used by normal mode,
30 the following ones are optional:
31 "ref_ck": reference clock used by low power mode etc,
32 "mcu_ck": mcu_bus clock for register access,
33 "dma_ck": dma_bus clock for data transfer by DMA
35 - phys : a list of phandle + phy specifier pairs
38 - mediatek,wakeup-src : 1: ip sleep wakeup mode; 2: line state wakeup
40 - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
41 control register, it depends on "mediatek,wakeup-src".
42 - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
43 bit1 for u3port1, ... etc;
44 - vbus-supply : reference to the VBUS regulator;
45 - usb3-lpm-capable : supports USB3.0 LPM
46 - pinctrl-names : a pinctrl state named "default" must be defined
47 - pinctrl-0 : pin control group
48 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
52 compatible = "mediatek,mt8173-xhci";
53 reg = <0 0x11270000 0 0x1000>,
54 <0 0x11280700 0 0x0100>;
55 reg-names = "mac", "ippc";
56 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
57 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
58 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
59 <&pericfg CLK_PERI_USB0>,
60 <&pericfg CLK_PERI_USB1>;
61 clock-names = "sys_ck", "ref_ck";
62 phys = <&phy_port0 PHY_TYPE_USB3>,
63 <&phy_port1 PHY_TYPE_USB2>;
64 vusb33-supply = <&mt6397_vusb_reg>;
65 vbus-supply = <&usb_p1_vbus>;
67 mediatek,syscon-wakeup = <&pericfg>;
68 mediatek,wakeup-src = <1>;
71 2nd: dual-role mode with xHCI driver
72 ------------------------------------------------------------------------
74 In the case, xhci is added as subnode to mtu3. An example and the DT binding
75 details of mtu3 can be found in:
76 Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
79 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
80 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
81 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
83 - "mediatek,mt8173-xhci"
84 - reg : specifies physical base address and size of the registers
85 - reg-names: should be "mac" for xHCI MAC
86 - interrupts : interrupt used by the host controller
87 - power-domains : a phandle to USB power domain node to control USB's
89 - vusb33-supply : regulator of USB avdd3.3v
91 - clocks : a list of phandle + clock-specifier pairs, one for each
93 - clock-names : must contain "sys_ck", and the following ones are optional:
94 "ref_ck", "mcu_ck" and "dma_ck"
97 - vbus-supply : reference to the VBUS regulator;
98 - usb3-lpm-capable : supports USB3.0 LPM
101 usb30: usb@11270000 {
102 compatible = "mediatek,mt8173-xhci";
103 reg = <0 0x11270000 0 0x1000>;
105 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
106 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
107 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
108 clock-names = "sys_ck", "ref_ck";
109 vusb33-supply = <&mt6397_vusb_reg>;