3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
4 as described in 'usb/generic.txt'
7 - compatible: must be "snps,dwc3"
8 - reg : Address and length of the register set for the device
9 - interrupts: Interrupts used by the dwc3 controller.
10 - clock-names: should contain "ref", "bus_early", "suspend"
11 - clocks: list of phandle and clock specifier pairs corresponding to
12 entries in the clock-names property.
15 clocks are optional if the parent node (i.e. glue-layer) is compatible to
17 "amlogic,meson-axg-dwc3"
18 "amlogic,meson-gxl-dwc3"
19 "cavium,octeon-7130-usb-uctl"
21 "samsung,exynos5250-dwusb3"
22 "samsung,exynos7-dwusb3"
28 "rockchip,rk3399-dwc3"
32 - usb-phy : array of phandle for the PHY device. The first element
33 in the array is expected to be a handle to the USB2/HS PHY and
34 the second element is expected to be a handle to the USB3/SS PHY
35 - phys: from the *Generic PHY* bindings
36 - phy-names: from the *Generic PHY* bindings; supported names are "usb2-phy"
38 - resets: a single pair of phandle and reset specifier
39 - snps,usb3_lpm_capable: determines if platform is USB3 LPM capable
40 - snps,disable_scramble_quirk: true when SW should disable data scrambling.
41 Only really useful for FPGA builds.
42 - snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
43 - snps,lpm-nyet-threshold: LPM NYET threshold
44 - snps,u2exit_lfps_quirk: set if we want to enable u2exit lfps quirk
45 - snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
46 - snps,req_p1p2p3_quirk: when set, the core will always request for
47 P1/P2/P3 transition sequence.
48 - snps,del_p1p2p3_quirk: when set core will delay P1/P2/P3 until a certain
49 amount of 8B10B errors occur.
50 - snps,del_phy_power_chg_quirk: when set core will delay PHY power change
52 - snps,lfps_filter_quirk: when set core will filter LFPS reception.
53 - snps,rx_detect_poll_quirk: when set core will disable a 400us delay to start
54 Polling LFPS after RX.Detect.
55 - snps,tx_de_emphasis_quirk: when set core will set Tx de-emphasis value.
56 - snps,tx_de_emphasis: the value driven to the PHY is controlled by the
57 LTSSM during USB3 Compliance mode.
58 - snps,dis_u3_susphy_quirk: when set core will disable USB3 suspend phy.
59 - snps,dis_u2_susphy_quirk: when set core will disable USB2 suspend phy.
60 - snps,dis_enblslpm_quirk: when set clears the enblslpm in GUSB2PHYCFG,
61 disabling the suspend signal to the PHY.
62 - snps,dis_rxdet_inp3_quirk: when set core will disable receiver detection
63 in PHY P3 power state.
64 - snps,dis-u2-freeclk-exists-quirk: when set, clear the u2_freeclk_exists
65 in GUSB2PHYCFG, specify that USB2 PHY doesn't provide
66 a free-running PHY clock.
67 - snps,dis-del-phy-power-chg-quirk: when set core will change PHY power
68 from P0 to P1/P2/P3 without delay.
69 - snps,dis-tx-ipgap-linecheck-quirk: when set, disable u2mac linestate check
71 - snps,dis_metastability_quirk: when set, disable metastability workaround.
72 CAUTION: use only if you are absolutely sure of it.
73 - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
74 utmi_l1_suspend_n, false when asserts utmi_sleep_n
75 - snps,hird-threshold: HIRD threshold
76 - snps,hsphy_interface: High-Speed PHY interface selection between "utmi" for
77 UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3.
78 - snps,quirk-frame-length-adjustment: Value for GFLADJ_30MHZ field of GFLADJ
79 register for post-silicon frame length adjustment when the
80 fladj_30mhz_sdbnd signal is invalid or incorrect.
81 - snps,rx-thr-num-pkt-prd: periodic ESS RX packet threshold count - host mode
82 only. Set this and rx-max-burst-prd to a valid,
83 non-zero value 1-16 (DWC_usb31 programming guide
84 section 1.2.4) to enable periodic ESS RX threshold.
85 - snps,rx-max-burst-prd: max periodic ESS RX burst size - host mode only. Set
86 this and rx-thr-num-pkt-prd to a valid, non-zero value
87 1-16 (DWC_usb31 programming guide section 1.2.4) to
88 enable periodic ESS RX threshold.
89 - snps,tx-thr-num-pkt-prd: periodic ESS TX packet threshold count - host mode
90 only. Set this and tx-max-burst-prd to a valid,
91 non-zero value 1-16 (DWC_usb31 programming guide
92 section 1.2.3) to enable periodic ESS TX threshold.
93 - snps,tx-max-burst-prd: max periodic ESS TX burst size - host mode only. Set
94 this and tx-thr-num-pkt-prd to a valid, non-zero value
95 1-16 (DWC_usb31 programming guide section 1.2.3) to
96 enable periodic ESS TX threshold.
98 - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be reallocated.
100 - in addition all properties from usb-xhci.txt from the current directory are
104 This is usually a subnode to DWC3 glue to which it is connected.
107 compatible = "snps,dwc3";
108 reg = <0x4a030000 0xcfff>;
109 interrupts = <0 92 4>
110 usb-phy = <&usb2_phy>, <&usb3,phy>;