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[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / thermal / rockchip-thermal.txt
1 * Temperature Sensor ADC (TSADC) on rockchip SoCs
2
3 Required properties:
4 - compatible : should be "rockchip,<name>-tsadc"
5    "rockchip,rk3228-tsadc": found on RK3228 SoCs
6    "rockchip,rk3288-tsadc": found on RK3288 SoCs
7    "rockchip,rk3368-tsadc": found on RK3368 SoCs
8    "rockchip,rk3399-tsadc": found on RK3399 SoCs
9 - reg : physical base address of the controller and length of memory mapped
10         region.
11 - interrupts : The interrupt number to the cpu. The interrupt specifier format
12                depends on the interrupt controller.
13 - clocks : Must contain an entry for each entry in clock-names.
14 - clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
15                 the peripheral clock.
16 - resets : Must contain an entry for each entry in reset-names.
17            See ../reset/reset.txt for details.
18 - reset-names : Must include the name "tsadc-apb".
19 - pinctrl-names : The pin control state names;
20 - pinctrl-0 : The "init" pinctrl state, it will be set before device probe.
21 - pinctrl-1 : The "default" pinctrl state, it will be set after reset the
22               TSADC controller.
23 - pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend.
24 - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
25
26 Optional properties:
27 - rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
28 - rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
29 - rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
30                                1:HIGH.
31 - rockchip,grf : The phandle of the syscon node for the general register file.
32
33 Exiample:
34 tsadc: tsadc@ff280000 {
35         compatible = "rockchip,rk3288-tsadc";
36         reg = <0xff280000 0x100>;
37         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
38         clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
39         clock-names = "tsadc", "apb_pclk";
40         resets = <&cru SRST_TSADC>;
41         reset-names = "tsadc-apb";
42         pinctrl-names = "init", "default", "sleep";
43         pinctrl-0 = <&otp_gpio>;
44         pinctrl-1 = <&otp_out>;
45         pinctrl-2 = <&otp_gpio>;
46         #thermal-sensor-cells = <1>;
47         rockchip,hw-tshut-temp = <95000>;
48         rockchip,hw-tshut-mode = <0>;
49         rockchip,hw-tshut-polarity = <0>;
50 };
51
52 Example: referring to thermal sensors:
53 thermal-zones {
54         cpu_thermal: cpu_thermal {
55                 polling-delay-passive = <1000>; /* milliseconds */
56                 polling-delay = <5000>; /* milliseconds */
57
58                 /* sensor       ID */
59                 thermal-sensors = <&tsadc       1>;
60
61                 trips {
62                         cpu_alert0: cpu_alert {
63                                 temperature = <70000>; /* millicelsius */
64                                 hysteresis = <2000>; /* millicelsius */
65                                 type = "passive";
66                         };
67                         cpu_crit: cpu_crit {
68                                 temperature = <90000>; /* millicelsius */
69                                 hysteresis = <2000>; /* millicelsius */
70                                 type = "critical";
71                         };
72                 };
73
74                 cooling-maps {
75                         map0 {
76                                 trip = <&cpu_alert0>;
77                                 cooling-device =
78                                     <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
79                         };
80                 };
81         };
82 };