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[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / thermal / qcom-spmi-temp-alarm.txt
1 Qualcomm QPNP PMIC Temperature Alarm
2
3 QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips
4 that utilize the Qualcomm SPMI implementation. These peripherals provide an
5 interrupt signal and status register to identify high PMIC die temperature.
6
7 Required properties:
8 - compatible:      Should contain "qcom,spmi-temp-alarm".
9 - reg:             Specifies the SPMI address.
10 - interrupts:      PMIC temperature alarm interrupt.
11 - #thermal-sensor-cells: Should be 0. See thermal.txt for a description.
12
13 Optional properties:
14 - io-channels:     Should contain IIO channel specifier for the ADC channel,
15                    which report chip die temperature.
16 - io-channel-names: Should contain "thermal".
17
18 Example:
19
20         pm8941_temp: thermal-alarm@2400 {
21                 compatible = "qcom,spmi-temp-alarm";
22                 reg = <0x2400>;
23                 interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
24                 #thermal-sensor-cells = <0>;
25
26                 io-channels = <&pm8941_vadc VADC_DIE_TEMP>;
27                 io-channel-names = "thermal";
28         };
29
30         thermal-zones {
31                 pm8941 {
32                         polling-delay-passive = <250>;
33                         polling-delay = <1000>;
34
35                         thermal-sensors = <&pm8941_temp>;
36
37                         trips {
38                                 stage1 {
39                                         temperature = <105000>;
40                                         hysteresis = <2000>;
41                                         type = "passive";
42                                 };
43                                 stage2 {
44                                         temperature = <125000>;
45                                         hysteresis = <2000>;
46                                         type = "critical";
47                                 };
48                         };
49                 };
50         };
51