EDAC/altera: Add separate SDRAM EDAC config
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / staging / iio / adc / lpc32xx-adc.txt
1 * NXP LPC32xx SoC ADC controller
2
3 Required properties:
4 - compatible: must be "nxp,lpc3220-adc"
5 - reg: physical base address of the controller and length of memory mapped
6   region.
7 - interrupts: The ADC interrupt
8
9 Example:
10
11         adc@40048000 {
12                 compatible = "nxp,lpc3220-adc";
13                 reg = <0x40048000 0x1000>;
14                 interrupt-parent = <&mic>;
15                 interrupts = <39 0>;
16         };