Documentation/devicetree/bindings/sram/qcom,ocmem.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/sram/qcom,ocmem.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: On Chip Memory (OCMEM) that is present on some Qualcomm Snapdragon SoCs.
   8
   9 maintainers:
  10   - Brian Masney <masneyb@onstation.org>
  11
  12 description: |
  13   The On Chip Memory (OCMEM) is typically used by the GPU, camera/video, and
  14   audio components on some Snapdragon SoCs.
  15
  16 properties:
  17   compatible:
  18     const: qcom,msm8974-ocmem
  19
  20   reg:
  21     items:
  22       - description: Control registers
  23       - description: OCMEM address range
  24
  25   reg-names:
  26     items:
  27       - const: ctrl
  28       - const: mem
  29
  30   clocks:
  31     items:
  32       - description: Core clock
  33       - description: Interface clock
  34
  35   clock-names:
  36     items:
  37       - const: core
  38       - const: iface
  39
  40   '#address-cells':
  41     const: 1
  42
  43   '#size-cells':
  44     const: 1
  45
  46 required:
  47   - compatible
  48   - reg
  49   - reg-names
  50   - clocks
  51   - clock-names
  52   - '#address-cells'
  53   - '#size-cells'
  54
  55 patternProperties:
  56   "^.+-sram$":
  57     type: object
  58     description: A region of reserved memory.
  59
  60     properties:
  61       reg:
  62         maxItems: 1
  63
  64       ranges:
  65         maxItems: 1
  66
  67     required:
  68       - reg
  69       - ranges
  70
  71 examples:
  72   - |
  73       #include <dt-bindings/clock/qcom,rpmcc.h>
  74       #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
  75
  76       ocmem: ocmem@fdd00000 {
  77         compatible = "qcom,msm8974-ocmem";
  78
  79         reg = <0xfdd00000 0x2000>,
  80               <0xfec00000 0x180000>;
  81         reg-names = "ctrl",
  82                     "mem";
  83
  84         clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,
  85                  <&mmcc OCMEMCX_OCMEMNOC_CLK>;
  86         clock-names = "core",
  87                       "iface";
  88
  89         #address-cells = <1>;
  90         #size-cells = <1>;
  91
  92         gmu-sram@0 {
  93                 reg = <0x0 0x100000>;
  94                 ranges = <0 0 0xfec00000 0x100000>;
  95         };
  96       };