1 Binding for MTK SPI controller
4 - compatible: should be one of the following.
5 - mediatek,mt2701-spi: for mt2701 platforms
6 - mediatek,mt2712-spi: for mt2712 platforms
7 - mediatek,mt6589-spi: for mt6589 platforms
8 - mediatek,mt7622-spi: for mt7622 platforms
9 - "mediatek,mt7629-spi", "mediatek,mt7622-spi": for mt7629 platforms
10 - mediatek,mt8135-spi: for mt8135 platforms
11 - mediatek,mt8173-spi: for mt8173 platforms
12 - mediatek,mt8183-spi: for mt8183 platforms
14 - #address-cells: should be 1.
16 - #size-cells: should be 0.
18 - reg: Address and length of the register set for the device
20 - interrupts: Should contain spi interrupt
22 - clocks: phandles to input clocks.
23 The first should be one of the following. It's PLL.
24 - <&clk26m>: specify parent clock 26MHZ.
25 - <&topckgen CLK_TOP_SYSPLL3_D2>: specify parent clock 109MHZ.
27 - <&topckgen CLK_TOP_SYSPLL4_D2>: specify parent clock 78MHZ.
28 - <&topckgen CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
29 - <&topckgen CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
30 The second should be <&topckgen CLK_TOP_SPI_SEL>. It's clock mux.
31 The third is <&pericfg CLK_PERI_SPI0>. It's clock gate.
33 - clock-names: shall be "parent-clk" for the parent clock, "sel-clk" for the
34 muxes clock, and "spi-clk" for the clock gate.
37 -cs-gpios: see spi-bus.txt.
39 - mediatek,pad-select: specify which pins group(ck/mi/mo/cs) spi
40 controller used. This is an array, the element value should be 0~3,
41 only required for MT8173.
42 0: specify GPIO69,70,71,72 for spi pins.
43 1: specify GPIO102,103,104,105 for spi pins.
44 2: specify GPIO128,129,130,131 for spi pins.
45 3: specify GPIO5,6,7,8 for spi pins.
49 - SoC Specific Portion:
51 compatible = "mediatek,mt8173-spi";
54 reg = <0 0x1100a000 0 0x1000>;
55 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
56 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
57 <&topckgen CLK_TOP_SPI_SEL>,
58 <&pericfg CLK_PERI_SPI0>;
59 clock-names = "parent-clk", "sel-clk", "spi-clk";
60 cs-gpios = <&pio 105 GPIO_ACTIVE_LOW>, <&pio 72 GPIO_ACTIVE_LOW>;
61 mediatek,pad-select = <1>, <0>;