1 * Freescale Quad Serial Peripheral Interface(QuadSPI)
4 - compatible : Should be "fsl,vf610-qspi", "fsl,imx6sx-qspi",
5 "fsl,imx7d-qspi", "fsl,imx6ul-qspi",
8 "fsl,ls2080a-qspi" followed by "fsl,ls1021a-qspi",
9 "fsl,ls1043a-qspi" followed by "fsl,ls1021a-qspi"
10 - reg : the first contains the register location and length,
11 the second contains the memory mapping address and length
12 - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory"
13 - interrupts : Should contain the interrupt for the device
14 - clocks : The clocks needed by the QuadSPI controller
15 - clock-names : Should contain the name of the clocks: "qspi_en" and "qspi".
17 Required SPI slave node properties:
18 - reg: There are two buses (A and B) with two chip selects each.
19 This encodes to which bus and CS the flash is connected:
27 qspi0: quadspi@40044000 {
28 compatible = "fsl,vf610-qspi";
29 reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
30 reg-names = "QuadSPI", "QuadSPI-memory";
31 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
32 clocks = <&clks VF610_CLK_QSPI0_EN>,
33 <&clks VF610_CLK_QSPI0>;
34 clock-names = "qspi_en", "qspi";
41 Example showing the usage of two SPI NOR devices on bus A:
44 pinctrl-names = "default";
45 pinctrl-0 = <&pinctrl_qspi2>;
51 compatible = "micron,n25q256a", "jedec,spi-nor";
52 spi-max-frequency = <29000000>;
59 compatible = "micron,n25q256a", "jedec,spi-nor";
60 spi-max-frequency = <29000000>;