1 Renesas MSIOF spi controller
4 - compatible : "renesas,msiof-r8a7743" (RZ/G1M)
5 "renesas,msiof-r8a7745" (RZ/G1E)
6 "renesas,msiof-r8a7790" (R-Car H2)
7 "renesas,msiof-r8a7791" (R-Car M2-W)
8 "renesas,msiof-r8a7792" (R-Car V2H)
9 "renesas,msiof-r8a7793" (R-Car M2-N)
10 "renesas,msiof-r8a7794" (R-Car E2)
11 "renesas,msiof-r8a7795" (R-Car H3)
12 "renesas,msiof-r8a7796" (R-Car M3-W)
13 "renesas,msiof-sh73a0" (SH-Mobile AG5)
14 "renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device)
15 "renesas,rcar-gen2-msiof" (generic R-Car Gen2 and RZ/G1 compatible device)
16 "renesas,rcar-gen3-msiof" (generic R-Car Gen3 compatible device)
17 "renesas,sh-msiof" (deprecated)
19 When compatible with the generic version, nodes
20 must list the SoC-specific version corresponding
21 to the platform first followed by the generic
24 - reg : A list of offsets and lengths of the register sets for
26 If only one register set is present, it is to be used
27 by both the CPU and the DMA engine.
28 If two register sets are present, the first is to be
29 used by the CPU, and the second is to be used by the
31 - interrupt-parent : The phandle for the interrupt controller that
32 services interrupts for this device
33 - interrupts : Interrupt specifier
34 - #address-cells : Must be <1>
35 - #size-cells : Must be <0>
38 - clocks : Must contain a reference to the functional clock.
39 - num-cs : Total number of chip-selects (default is 1)
40 - dmas : Must contain a list of two references to DMA
41 specifiers, one for transmission, and one for
43 - dma-names : Must contain a list of two DMA names, "tx" and "rx".
44 - spi-slave : Empty property indicating the SPI controller is used
46 - renesas,dtdl : delay sync signal (setup) in transmit mode.
47 Must contain one of the following values:
49 50 (0.5-clock-cycle delay)
50 100 (1-clock-cycle delay)
51 150 (1.5-clock-cycle delay)
52 200 (2-clock-cycle delay)
54 - renesas,syncdl : delay sync signal (hold) in transmit mode.
55 Must contain one of the following values:
57 50 (0.5-clock-cycle delay)
58 100 (1-clock-cycle delay)
59 150 (1.5-clock-cycle delay)
60 200 (2-clock-cycle delay)
61 300 (3-clock-cycle delay)
63 Optional properties, deprecated for soctype-specific bindings:
64 - renesas,tx-fifo-size : Overrides the default tx fifo size given in words
66 - renesas,rx-fifo-size : Overrides the default rx fifo size given in words
69 Pinctrl properties might be needed, too. See
70 Documentation/devicetree/bindings/pinctrl/renesas,*.
74 msiof0: spi@e6e20000 {
75 compatible = "renesas,msiof-r8a7791",
76 "renesas,rcar-gen2-msiof";
77 reg = <0 0xe6e20000 0 0x0064>;
78 interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
79 clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
80 dmas = <&dmac0 0x51>, <&dmac0 0x52>;
81 dma-names = "tx", "rx";