1 Renesas MSIOF spi controller
4 - compatible : "renesas,msiof-r8a7743" (RZ/G1M)
5 "renesas,msiof-r8a7744" (RZ/G1N)
6 "renesas,msiof-r8a7745" (RZ/G1E)
7 "renesas,msiof-r8a774a1" (RZ/G2M)
8 "renesas,msiof-r8a774c0" (RZ/G2E)
9 "renesas,msiof-r8a7790" (R-Car H2)
10 "renesas,msiof-r8a7791" (R-Car M2-W)
11 "renesas,msiof-r8a7792" (R-Car V2H)
12 "renesas,msiof-r8a7793" (R-Car M2-N)
13 "renesas,msiof-r8a7794" (R-Car E2)
14 "renesas,msiof-r8a7795" (R-Car H3)
15 "renesas,msiof-r8a7796" (R-Car M3-W)
16 "renesas,msiof-r8a77965" (R-Car M3-N)
17 "renesas,msiof-r8a77970" (R-Car V3M)
18 "renesas,msiof-r8a77980" (R-Car V3H)
19 "renesas,msiof-r8a77990" (R-Car E3)
20 "renesas,msiof-r8a77995" (R-Car D3)
21 "renesas,msiof-sh73a0" (SH-Mobile AG5)
22 "renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device)
23 "renesas,rcar-gen2-msiof" (generic R-Car Gen2 and RZ/G1 compatible device)
24 "renesas,rcar-gen3-msiof" (generic R-Car Gen3 and RZ/G2 compatible device)
25 "renesas,sh-msiof" (deprecated)
27 When compatible with the generic version, nodes
28 must list the SoC-specific version corresponding
29 to the platform first followed by the generic
32 - reg : A list of offsets and lengths of the register sets for
34 If only one register set is present, it is to be used
35 by both the CPU and the DMA engine.
36 If two register sets are present, the first is to be
37 used by the CPU, and the second is to be used by the
39 - interrupts : Interrupt specifier
40 - #address-cells : Must be <1>
41 - #size-cells : Must be <0>
44 - clocks : Must contain a reference to the functional clock.
45 - num-cs : Total number of chip selects (default is 1).
46 Up to 3 native chip selects are supported:
50 Hardware limitations related to chip selects:
51 - Native chip selects are always deasserted in
52 between transfers that are part of the same
53 message. Use cs-gpios to work around this.
54 - All slaves using native chip selects must use the
55 same spi-cs-high configuration. Use cs-gpios to
57 - When using GPIO chip selects, at least one native
58 chip select must be left unused, as it will be
60 - dmas : Must contain a list of two references to DMA
61 specifiers, one for transmission, and one for
63 - dma-names : Must contain a list of two DMA names, "tx" and "rx".
64 - spi-slave : Empty property indicating the SPI controller is used
66 - renesas,dtdl : delay sync signal (setup) in transmit mode.
67 Must contain one of the following values:
69 50 (0.5-clock-cycle delay)
70 100 (1-clock-cycle delay)
71 150 (1.5-clock-cycle delay)
72 200 (2-clock-cycle delay)
74 - renesas,syncdl : delay sync signal (hold) in transmit mode.
75 Must contain one of the following values:
77 50 (0.5-clock-cycle delay)
78 100 (1-clock-cycle delay)
79 150 (1.5-clock-cycle delay)
80 200 (2-clock-cycle delay)
81 300 (3-clock-cycle delay)
83 Optional properties, deprecated for soctype-specific bindings:
84 - renesas,tx-fifo-size : Overrides the default tx fifo size given in words
86 - renesas,rx-fifo-size : Overrides the default rx fifo size given in words
89 Pinctrl properties might be needed, too. See
90 Documentation/devicetree/bindings/pinctrl/renesas,*.
94 msiof0: spi@e6e20000 {
95 compatible = "renesas,msiof-r8a7791",
96 "renesas,rcar-gen2-msiof";
97 reg = <0 0xe6e20000 0 0x0064>;
98 interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
99 clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
100 dmas = <&dmac0 0x51>, <&dmac0 0x52>;
101 dma-names = "tx", "rx";
102 #address-cells = <1>;