1 * Freescale (Enhanced) Configurable Serial Peripheral Interface
6 - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1
7 - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21
8 - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27
9 - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31
10 - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35
11 - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
12 - reg : Offset and length of the register set for the device
13 - interrupts : Should contain CSPI/eCSPI interrupt
14 - cs-gpios : Specifies the gpio pins to be used for chipselects.
15 - clocks : Clock specifiers for both ipg and per clocks.
16 - clock-names : Clock names should include both "ipg" and "per"
17 See the clock consumer binding,
18 Documentation/devicetree/bindings/clock/clock-bindings.txt
19 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
20 Documentation/devicetree/bindings/dma/dma.txt
21 - dma-names: DMA request names should include "tx" and "rx" if present.
24 - fsl,spi-num-chipselects : Contains the number of the chipselect
27 - fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register
28 controlling the SPI_READY handling. Note that to enable the DRCTL consideration,
29 the SPI_READY mode-flag needs to be set too.
30 Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
37 compatible = "fsl,imx51-ecspi";
38 reg = <0x70010000 0x4000>;
40 cs-gpios = <&gpio3 24 0>, /* GPIO3_24 */
41 <&gpio3 25 0>; /* GPIO3_25 */
42 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
43 dma-names = "rx", "tx";
44 fsl,spi-rdy-drctl = <1>;