Documentation/devicetree/bindings/sound/rockchip,pdm.txt

   1 * Rockchip PDM controller
   2
   3 Required properties:
   4
   5 - compatible: "rockchip,pdm"
   6   - "rockchip,px30-pdm"
   7   - "rockchip,rk1808-pdm"
   8   - "rockchip,rk3308-pdm"
   9 - reg: physical base address of the controller and length of memory mapped
  10   region.
  11 - dmas: DMA specifiers for rx dma. See the DMA client binding,
  12         Documentation/devicetree/bindings/dma/dma.txt
  13 - dma-names: should include "rx".
  14 - clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
  15 - clock-names: should contain following:
  16    - "pdm_hclk": clock for PDM BUS
  17    - "pdm_clk" : clock for PDM controller
  18 - resets: a list of phandle + reset-specifer paris, one for each entry in reset-names.
  19 - reset-names: reset names, should include "pdm-m".
  20 - pinctrl-names: Must contain a "default" entry.
  21 - pinctrl-N: One property must exist for each entry in
  22              pinctrl-names. See ../pinctrl/pinctrl-bindings.txt
  23              for details of the property values.
  24
  25 Example for rk3328 PDM controller:
  26
  27 pdm: pdm@ff040000 {
  28         compatible = "rockchip,pdm";
  29         reg = <0x0 0xff040000 0x0 0x1000>;
  30         clocks = <&clk_pdm>, <&clk_gates28 0>;
  31         clock-names = "pdm_clk", "pdm_hclk";
  32         dmas = <&pdma 16>;
  33         #dma-cells = <1>;
  34         dma-names = "rx";
  35         pinctrl-names = "default", "sleep";
  36         pinctrl-0 = <&pdmm0_clk
  37                      &pdmm0_sdi0
  38                      &pdmm0_sdi1
  39                      &pdmm0_sdi2
  40                      &pdmm0_sdi3>;
  41         pinctrl-1 = <&pdmm0_clk_sleep
  42                      &pdmm0_sdi0_sleep
  43                      &pdmm0_sdi1_sleep
  44                      &pdmm0_sdi2_sleep
  45                      &pdmm0_sdi3_sleep>;
  46 };