Merge tag 'upstream-5.2-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / pwm / pwm-tiehrpwm.txt
1 TI SOC EHRPWM based PWM controller
2
3 Required properties:
4 - compatible: Must be "ti,<soc>-ehrpwm".
5   for am33xx  - compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
6   for am4372  - compatible = "ti,am4372-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
7   for am654   - compatible = "ti,am654-ehrpwm", "ti-am3352-ehrpwm";
8   for da850   - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
9   for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm";
10 - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
11   the cells format. The only third cell flag supported by this binding is
12   PWM_POLARITY_INVERTED.
13 - reg: physical base address and size of the registers map.
14
15 Optional properties:
16 - clocks: Handle to the PWM's time-base and functional clock.
17 - clock-names: Must be set to "tbclk" and "fck".
18
19 Example:
20
21 ehrpwm0: pwm@48300200 { /* EHRPWM on am33xx */
22         compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
23         #pwm-cells = <3>;
24         reg = <0x48300200 0x100>;
25         clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
26         clock-names = "tbclk", "fck";
27 };
28
29 ehrpwm0: pwm@48300200 { /* EHRPWM on am4372 */
30         compatible = "ti,am4372-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
31         #pwm-cells = <3>;
32         reg = <0x48300200 0x80>;
33         clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
34         clock-names = "tbclk", "fck";
35         ti,hwmods = "ehrpwm0";
36 };
37
38 ehrpwm0: pwm@1f00000 { /* EHRPWM on da850 */
39         compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
40         #pwm-cells = <3>;
41         reg = <0x1f00000 0x2000>;
42 };
43
44 ehrpwm0: pwm@4843e200 { /* EHRPWM on dra746 */
45         compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm";
46         #pwm-cells = <3>;
47         reg = <0x4843e200 0x80>;
48         clocks = <&ehrpwm0_tbclk>, <&l4_root_clk_div>;
49         clock-names = "tbclk", "fck";
50 };