Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / pwm / pwm-tiehrpwm.txt
1 TI SOC EHRPWM based PWM controller
2
3 Required properties:
4 - compatible: Must be "ti,<soc>-ehrpwm".
5   for am33xx  - compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
6   for am4372  - compatible = "ti,am4372-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
7   for da850   - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
8   for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm";
9 - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
10   the cells format. The only third cell flag supported by this binding is
11   PWM_POLARITY_INVERTED.
12 - reg: physical base address and size of the registers map.
13
14 Optional properties:
15 - clocks: Handle to the PWM's time-base and functional clock.
16 - clock-names: Must be set to "tbclk" and "fck".
17
18 Example:
19
20 ehrpwm0: pwm@48300200 { /* EHRPWM on am33xx */
21         compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
22         #pwm-cells = <3>;
23         reg = <0x48300200 0x100>;
24         clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
25         clock-names = "tbclk", "fck";
26 };
27
28 ehrpwm0: pwm@48300200 { /* EHRPWM on am4372 */
29         compatible = "ti,am4372-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
30         #pwm-cells = <3>;
31         reg = <0x48300200 0x80>;
32         clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
33         clock-names = "tbclk", "fck";
34         ti,hwmods = "ehrpwm0";
35 };
36
37 ehrpwm0: pwm@1f00000 { /* EHRPWM on da850 */
38         compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
39         #pwm-cells = <3>;
40         reg = <0x1f00000 0x2000>;
41 };
42
43 ehrpwm0: pwm@4843e200 { /* EHRPWM on dra746 */
44         compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm";
45         #pwm-cells = <3>;
46         reg = <0x4843e200 0x80>;
47         clocks = <&ehrpwm0_tbclk>, <&l4_root_clk_div>;
48         clock-names = "tbclk", "fck";
49 };