1 Qualcomm Technologies, Inc. SC7180 TLMM block
3 This binding describes the Top Level Mode Multiplexer block found in the
9 Definition: must be "qcom,sc7180-pinctrl"
13 Value type: <prop-encoded-array>
14 Definition: the base address and size of the north, south and west
19 Value type: <prop-encoded-array>
20 Definition: names for the cells of reg, must contain "north", "south"
25 Value type: <prop-encoded-array>
26 Definition: should specify the TLMM summary IRQ.
28 - interrupt-controller:
31 Definition: identifies this node as an interrupt controller
36 Definition: must be 2. Specifying the pin number and flags, as defined
37 in <dt-bindings/interrupt-controller/irq.h>
42 Definition: identifies this node as a gpio controller
47 Definition: must be 2. Specifying the pin number and flags, as defined
48 in <dt-bindings/gpio/gpio.h>
52 Value type: <prop-encoded-array>
53 Definition: see ../gpio/gpio.txt
55 - gpio-reserved-ranges:
57 Value type: <prop-encoded-array>
58 Definition: see ../gpio/gpio.txt
60 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
61 a general description of GPIO and interrupt bindings.
63 Please refer to pinctrl-bindings.txt in this directory for details of the
64 common pinctrl bindings used by client devices, including the meaning of the
65 phrase "pin configuration node".
67 The pin configuration nodes act as a container for an arbitrary number of
68 subnodes. Each of these subnodes represents some desired configuration for a
69 pin, a group, or a list of pins or groups. This configuration can include the
70 mux function to select on those pin(s)/group(s), and various pin configuration
71 parameters, such as pull-up, drive strength, etc.
74 PIN CONFIGURATION NODES:
76 The name of each subnode is not important; all subnodes should be enumerated
77 and processed purely based on their content.
79 Each subnode only affects those parameters that are explicitly listed. In
80 other words, a subnode that lists a mux function but no pin configuration
81 parameters implies no information about any pin configuration parameters.
82 Similarly, a pin subnode that describes a pullup parameter implies no
83 information about e.g. the mux function.
86 The following generic properties as defined in pinctrl-bindings.txt are valid
87 to specify in a pin configuration subnode:
91 Value type: <string-array>
92 Definition: List of gpio pins affected by the properties specified in
97 Supports mux, bias and drive-strength
99 sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd,
101 Supports bias and drive-strength
104 Supports bias and drive-strength
109 Definition: Specify the alternative function to be configured for the
110 specified pins. Functions are only valid for gpio pins.
113 adsp_ext, agera_pll, aoss_cti, atest_char, atest_char0,
114 atest_char1, atest_char2, atest_char3, atest_tsens,
115 atest_tsens2, atest_usb1, atest_usb10, atest_usb11,
116 atest_usb12, atest_usb13, atest_usb2, atest_usb20,
117 atest_usb21, atest_usb22, atest_usb23, audio_ref,
118 btfm_slimbus, cam_mclk, cci_async, cci_i2c, cci_timer0,
119 cci_timer1, cci_timer2, cci_timer3, cci_timer4,
120 cri_trng, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1,
121 ddr_pxi2, ddr_pxi3, dp_hot, edp_lcd, gcc_gp1, gcc_gp2,
122 gcc_gp3, gpio, gp_pdm0, gp_pdm1, gp_pdm2, gps_tx,
123 jitter_bist, ldo_en, ldo_update, lpass_ext, mdp_vsync,
124 mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s_0,
125 mi2s_1, mi2s_2, mss_lte, m_voc, pa_indicator, phase_flag,
126 PLL_BIST, pll_bypassnl, pll_reset, prng_rosc, qdss,
127 qdss_cti, qlink_enable, qlink_request, qspi_clk, qspi_cs,
128 qspi_data, qup00, qup01, qup02, qup03, qup04, qup05,
129 qup10, qup11, qup12, qup13, qup14, qup15, sdc1_tb,
130 sdc2_tb, sd_write, sp_cmu, tgu_ch0, tgu_ch1, tgu_ch2,
131 tgu_ch3, tsense_pwm1, tsense_pwm2, uim1, uim2, uim_batt,
132 usb_phy, vfr_1, _V_GPIO, _V_PPS_IN, _V_PPS_OUT,
133 vsense_trigger, wlan1_adc0, wlan1_adc1, wlan2_adc0,
139 Definition: The specified pins should be configured as no pull.
144 Definition: The specified pins should be configured as pull down.
149 Definition: The specified pins should be configured as pull up.
154 Definition: The specified pins are configured in output mode, driven
156 Not valid for sdc pins.
161 Definition: The specified pins are configured in output mode, driven
163 Not valid for sdc pins.
168 Definition: Selects the drive strength for the specified pins, in mA.
169 Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
173 tlmm: pinctrl@3500000 {
174 compatible = "qcom,sc7180-pinctrl";
175 reg = <0x3500000 0x300000>,
176 <0x3900000 0x300000>,
177 <0x3D00000 0x300000>;
178 reg-names = "west", "north", "south";
179 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
182 gpio-ranges = <&tlmm 0 0 119>;
183 gpio-reserved-ranges = <0 4>, <106 4>;
184 interrupt-controller;
185 #interrupt-cells = <2>;