1 Qualcomm PMIC GPIO block
3 This binding describes the GPIO block(s) found in the 8xxx series of
9 Definition: must be one of:
24 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
25 if the device is on an spmi bus or an ssbi bus respectively
29 Value type: <prop-encoded-array>
30 Definition: Register base of the GPIO block and length.
34 Value type: <prop-encoded-array>
35 Definition: Must contain an array of encoded interrupt specifiers for
41 Definition: Mark the device node as a GPIO controller
46 Definition: Must be 2;
47 the first cell will be used to define gpio number and the
48 second denotes the flags for this gpio
50 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
51 a general description of GPIO and interrupt bindings.
53 Please refer to pinctrl-bindings.txt in this directory for details of the
54 common pinctrl bindings used by client devices, including the meaning of the
55 phrase "pin configuration node".
57 The pin configuration nodes act as a container for an arbitrary number of
58 subnodes. Each of these subnodes represents some desired configuration for a
59 pin or a list of pins. This configuration can include the
60 mux function to select on those pin(s), and various pin configuration
61 parameters, as listed below.
66 The name of each subnode is not important; all subnodes should be enumerated
67 and processed purely based on their content.
69 Each subnode only affects those parameters that are explicitly listed. In
70 other words, a subnode that lists a mux function but no pin configuration
71 parameters implies no information about any pin configuration parameters.
72 Similarly, a pin subnode that describes a pullup parameter implies no
73 information about e.g. the mux function.
75 The following generic properties as defined in pinctrl-bindings.txt are valid
76 to specify in a pin configuration subnode:
80 Value type: <string-array>
81 Definition: List of gpio pins affected by the properties specified in
82 this subnode. Valid pins are:
83 gpio1-gpio4 for pm8005
84 gpio1-gpio6 for pm8018
85 gpio1-gpio12 for pm8038
86 gpio1-gpio40 for pm8058
87 gpio1-gpio4 for pm8916
88 gpio1-gpio38 for pm8917
89 gpio1-gpio44 for pm8921
90 gpio1-gpio36 for pm8941
91 gpio1-gpio22 for pm8994
92 gpio1-gpio26 for pm8998
93 gpio1-gpio22 for pma8084
94 gpio1-gpio10 for pmi8994
95 gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10)
100 Definition: Specify the alternative function to be configured for the
101 specified pins. Valid values are:
110 And following values are supported by LV/MV GPIO subtypes:
117 Definition: The specified pins should be configured as no pull.
122 Definition: The specified pins should be configured as pull down.
127 Definition: The specified pins should be configured as pull up.
129 - qcom,pull-up-strength:
132 Definition: Specifies the strength to use for pull up, if selected.
133 Valid values are; as defined in
134 <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
135 1: 30uA (PMIC_GPIO_PULL_UP_30)
136 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5)
137 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5)
138 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30)
139 If this property is omitted 30uA strength will be used if
142 - bias-high-impedance:
145 Definition: The specified pins will put in high-Z mode and disabled.
150 Definition: The specified pins are put in input mode.
155 Definition: The specified pins are configured in output mode, driven
161 Definition: The specified pins are configured in output mode, driven
167 Definition: Selects the power source for the specified pins. Valid
168 power sources are defined per chip in
169 <dt-bindings/pinctrl/qcom,pmic-gpio.h>
171 - qcom,drive-strength:
174 Definition: Selects the drive strength for the specified pins. Value
176 0: no (PMIC_GPIO_STRENGTH_NO)
177 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
178 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
179 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
180 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
185 Definition: The specified pins are configured in push-pull mode.
190 Definition: The specified pins are configured in open-drain mode.
195 Definition: The specified pins are configured in open-source mode.
200 Definition: The specified pins are configured in analog-pass-through mode.
205 Definition: Selects ATEST rail to route to GPIO when it's configured
206 in analog-pass-through mode.
207 Valid values are 1-4 corresponding to ATEST1 to ATEST4.
212 Definition: Selects DTEST rail to route to GPIO when it's configured
214 Valid values are 1-4 corresponding to DTEST1 to DTEST4.
218 pm8921_gpio: gpio@150 {
219 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
221 interrupts = <192 1>, <193 1>, <194 1>,
222 <195 1>, <196 1>, <197 1>,
223 <198 1>, <199 1>, <200 1>,
224 <201 1>, <202 1>, <203 1>,
225 <204 1>, <205 1>, <206 1>,
226 <207 1>, <208 1>, <209 1>,
227 <210 1>, <211 1>, <212 1>,
228 <213 1>, <214 1>, <215 1>,
229 <216 1>, <217 1>, <218 1>,
230 <219 1>, <220 1>, <221 1>,
231 <222 1>, <223 1>, <224 1>,
232 <225 1>, <226 1>, <227 1>,
233 <228 1>, <229 1>, <230 1>,
234 <231 1>, <232 1>, <233 1>,
240 pm8921_gpio_keys: gpio-keys {
242 pins = "gpio20", "gpio21";
248 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
249 power-source = <PM8921_GPIO_S4>;