1 Qualcomm PMIC GPIO block
3 This binding describes the GPIO block(s) found in the 8xxx series of
9 Definition: must be one of:
22 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
23 if the device is on an spmi bus or an ssbi bus respectively
27 Value type: <prop-encoded-array>
28 Definition: Register base of the GPIO block and length.
32 Value type: <prop-encoded-array>
33 Definition: Must contain an array of encoded interrupt specifiers for
39 Definition: Mark the device node as a GPIO controller
44 Definition: Must be 2;
45 the first cell will be used to define gpio number and the
46 second denotes the flags for this gpio
48 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
49 a general description of GPIO and interrupt bindings.
51 Please refer to pinctrl-bindings.txt in this directory for details of the
52 common pinctrl bindings used by client devices, including the meaning of the
53 phrase "pin configuration node".
55 The pin configuration nodes act as a container for an arbitrary number of
56 subnodes. Each of these subnodes represents some desired configuration for a
57 pin or a list of pins. This configuration can include the
58 mux function to select on those pin(s), and various pin configuration
59 parameters, as listed below.
64 The name of each subnode is not important; all subnodes should be enumerated
65 and processed purely based on their content.
67 Each subnode only affects those parameters that are explicitly listed. In
68 other words, a subnode that lists a mux function but no pin configuration
69 parameters implies no information about any pin configuration parameters.
70 Similarly, a pin subnode that describes a pullup parameter implies no
71 information about e.g. the mux function.
73 The following generic properties as defined in pinctrl-bindings.txt are valid
74 to specify in a pin configuration subnode:
78 Value type: <string-array>
79 Definition: List of gpio pins affected by the properties specified in
80 this subnode. Valid pins are:
81 gpio1-gpio6 for pm8018
82 gpio1-gpio12 for pm8038
83 gpio1-gpio40 for pm8058
84 gpio1-gpio4 for pm8916
85 gpio1-gpio38 for pm8917
86 gpio1-gpio44 for pm8921
87 gpio1-gpio36 for pm8941
88 gpio1-gpio22 for pm8994
89 gpio1-gpio10 for pmi8994
90 gpio1-gpio22 for pma8084
91 gpio1-gpio10 for pmi8994
96 Definition: Specify the alternative function to be configured for the
97 specified pins. Valid values are:
106 And following values are supported by LV/MV GPIO subtypes:
113 Definition: The specified pins should be configured as no pull.
118 Definition: The specified pins should be configured as pull down.
123 Definition: The specified pins should be configured as pull up.
125 - qcom,pull-up-strength:
128 Definition: Specifies the strength to use for pull up, if selected.
129 Valid values are; as defined in
130 <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
131 1: 30uA (PMIC_GPIO_PULL_UP_30)
132 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5)
133 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5)
134 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30)
135 If this property is omitted 30uA strength will be used if
138 - bias-high-impedance:
141 Definition: The specified pins will put in high-Z mode and disabled.
146 Definition: The specified pins are put in input mode.
151 Definition: The specified pins are configured in output mode, driven
157 Definition: The specified pins are configured in output mode, driven
163 Definition: Selects the power source for the specified pins. Valid
164 power sources are defined per chip in
165 <dt-bindings/pinctrl/qcom,pmic-gpio.h>
167 - qcom,drive-strength:
170 Definition: Selects the drive strength for the specified pins. Value
172 0: no (PMIC_GPIO_STRENGTH_NO)
173 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
174 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
175 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
176 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
181 Definition: The specified pins are configured in push-pull mode.
186 Definition: The specified pins are configured in open-drain mode.
191 Definition: The specified pins are configured in open-source mode.
196 Definition: The specified pins are configured in analog-pass-through mode.
201 Definition: Selects ATEST rail to route to GPIO when it's configured
202 in analog-pass-through mode.
203 Valid values are 1-4 corresponding to ATEST1 to ATEST4.
208 Definition: Selects DTEST rail to route to GPIO when it's configured
210 Valid values are 1-4 corresponding to DTEST1 to DTEST4.
214 pm8921_gpio: gpio@150 {
215 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
217 interrupts = <192 1>, <193 1>, <194 1>,
218 <195 1>, <196 1>, <197 1>,
219 <198 1>, <199 1>, <200 1>,
220 <201 1>, <202 1>, <203 1>,
221 <204 1>, <205 1>, <206 1>,
222 <207 1>, <208 1>, <209 1>,
223 <210 1>, <211 1>, <212 1>,
224 <213 1>, <214 1>, <215 1>,
225 <216 1>, <217 1>, <218 1>,
226 <219 1>, <220 1>, <221 1>,
227 <222 1>, <223 1>, <224 1>,
228 <225 1>, <226 1>, <227 1>,
229 <228 1>, <229 1>, <230 1>,
230 <231 1>, <232 1>, <233 1>,
236 pm8921_gpio_keys: gpio-keys {
238 pins = "gpio20", "gpio21";
244 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
245 power-source = <PM8921_GPIO_S4>;