Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2400-pinctrl.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: ASPEED AST2400 Pin Controller
   8
   9 maintainers:
  10   - Andrew Jeffery <andrew@aj.id.au>
  11
  12 description: |+
  13   The pin controller node should be the child of a syscon node with the
  14   required property:
  15
  16   - compatible:     Should be one of the following:
  17                     "aspeed,ast2400-scu", "syscon", "simple-mfd"
  18                     "aspeed,g4-scu", "syscon", "simple-mfd"
  19
  20   Refer to the the bindings described in
  21   Documentation/devicetree/bindings/mfd/syscon.txt
  22
  23 properties:
  24   compatible:
  25     enum: [ aspeed,ast2400-pinctrl, aspeed,g4-pinctrl ]
  26
  27 patternProperties:
  28   '^.*$':
  29     if:
  30       type: object
  31     then:
  32       patternProperties:
  33         "^function|groups$":
  34           allOf:
  35             - $ref: "/schemas/types.yaml#/definitions/string"
  36             - enum: [ "ACPI", "ADC0", "ADC1", "ADC10", "ADC11", "ADC12", "ADC13",
  37               "ADC14", "ADC15", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC7",
  38               "ADC8", "ADC9", "BMCINT", "DDCCLK", "DDCDAT", "EXTRST", "FLACK",
  39               "FLBUSY", "FLWP", "GPID", "GPID0", "GPID2", "GPID4", "GPID6",
  40               "GPIE0", "GPIE2", "GPIE4", "GPIE6", "I2C10", "I2C11", "I2C12",
  41               "I2C13", "I2C14", "I2C3", "I2C4", "I2C5", "I2C6", "I2C7", "I2C8",
  42               "I2C9", "LPCPD", "LPCPME", "LPCRST", "LPCSMI", "MAC1LINK",
  43               "MAC2LINK", "MDIO1", "MDIO2", "NCTS1", "NCTS2", "NCTS3", "NCTS4",
  44               "NDCD1", "NDCD2", "NDCD3", "NDCD4", "NDSR1", "NDSR2", "NDSR3",
  45               "NDSR4", "NDTR1", "NDTR2", "NDTR3", "NDTR4", "NDTS4", "NRI1",
  46               "NRI2", "NRI3", "NRI4", "NRTS1", "NRTS2", "NRTS3", "OSCCLK",
  47               "PWM0", "PWM1", "PWM2", "PWM3", "PWM4", "PWM5", "PWM6", "PWM7",
  48               "RGMII1", "RGMII2", "RMII1", "RMII2", "ROM16", "ROM8", "ROMCS1",
  49               "ROMCS2", "ROMCS3", "ROMCS4", "RXD1", "RXD2", "RXD3", "RXD4",
  50               "SALT1", "SALT2", "SALT3", "SALT4", "SD1", "SD2", "SGPMCK",
  51               "SGPMI", "SGPMLD", "SGPMO", "SGPSCK", "SGPSI0", "SGPSI1", "SGPSLD",
  52               "SIOONCTRL", "SIOPBI", "SIOPBO", "SIOPWREQ", "SIOPWRGD", "SIOS3",
  53               "SIOS5", "SIOSCI", "SPI1", "SPI1DEBUG", "SPI1PASSTHRU", "SPICS1",
  54               "TIMER3", "TIMER4", "TIMER5", "TIMER6", "TIMER7", "TIMER8", "TXD1",
  55               "TXD2", "TXD3", "TXD4", "UART6", "USB11D1", "USB11H2", "USB2D1",
  56               "USB2H1", "USBCKI", "VGABIOS_ROM", "VGAHS", "VGAVS", "VPI18",
  57               "VPI24", "VPI30", "VPO12", "VPO24", "WDTRST1", "WDTRST2" ]
  58
  59 required:
  60   - compatible
  61
  62 examples:
  63   - |
  64     syscon: scu@1e6e2000 {
  65         compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
  66         reg = <0x1e6e2000 0x1a8>;
  67
  68         pinctrl: pinctrl {
  69             compatible = "aspeed,g4-pinctrl";
  70
  71             pinctrl_i2c3_default: i2c3_default {
  72                 function = "I2C3";
  73                 groups = "I2C3";
  74             };
  75
  76             pinctrl_gpioh0_unbiased_default: gpioh0 {
  77                 pins = "A8";
  78                 bias-disable;
  79             };
  80         };
  81     };