1 * Allwinner A1X Pin Controller
3 The pins controlled by sunXi pin controller are organized in banks,
4 each bank has 32 pins. Each pin has 7 multiplexing functions, with
5 the first two functions being GPIO in and out. The configuration on
6 the pins includes drive strength and pull-up.
9 - compatible: Should be one of the following (depending on your SoC):
10 "allwinner,sun4i-a10-pinctrl"
11 "allwinner,sun5i-a10s-pinctrl"
12 "allwinner,sun5i-a13-pinctrl"
13 "allwinner,sun6i-a31-pinctrl"
14 "allwinner,sun6i-a31s-pinctrl"
15 "allwinner,sun6i-a31-r-pinctrl"
16 "allwinner,sun7i-a20-pinctrl"
17 "allwinner,sun8i-a23-pinctrl"
18 "allwinner,sun8i-a23-r-pinctrl"
19 "allwinner,sun8i-a33-pinctrl"
20 "allwinner,sun9i-a80-pinctrl"
21 "allwinner,sun9i-a80-r-pinctrl"
22 "allwinner,sun8i-a83t-pinctrl"
23 "allwinner,sun8i-h3-pinctrl"
24 "allwinner,sun8i-h3-r-pinctrl"
25 "allwinner,sun50i-a64-pinctrl"
26 "allwinner,sun50i-a64-r-pinctrl"
27 "allwinner,sun50i-h5-pinctrl"
28 "nextthing,gr8-pinctrl"
30 - reg: Should contain the register physical address and length for the
33 - clocks: phandle to the clocks feeding the pin controller:
34 - "apb": the gated APB parent clock
35 - "hosc": the high frequency oscillator in the system
36 - "losc": the low frequency oscillator in the system
38 Note: For backward compatibility reasons, the hosc and losc clocks are only
39 required if you need to use the optional input-debounce property. Any new
40 device tree should set them.
43 - input-debounce: Array of debouncing periods in microseconds. One period per
44 irq bank found in the controller. 0 if no setup required.
47 Please refer to pinctrl-bindings.txt in this directory for details of the
48 common pinctrl bindings used by client devices.
50 A pinctrl node should contain at least one subnodes representing the
51 pinctrl groups available on the machine. Each subnode will list the
52 pins it needs, and how they should be configured, with regard to muxer
53 configuration, drive strength and pullups. If one of these options is
54 not set, its actual value will be unspecified.
56 This driver supports the generic pin multiplexing and configuration
57 bindings. For details on each properties, you can refer to
58 ./pinctrl-bindings.txt.
60 Required sub-node properties:
64 Optional sub-node properties:
70 *** Deprecated pin configuration and multiplexing binding
72 Required subnode-properties:
74 - allwinner,pins: List of strings containing the pin name.
75 - allwinner,function: Function to mux the pins listed above to.
77 Optional subnode-properties:
78 - allwinner,drive: Integer. Represents the current sent to the pin
83 - allwinner,pull: Integer.
90 pio: pinctrl@01c20800 {
91 compatible = "allwinner,sun5i-a13-pinctrl";
92 reg = <0x01c20800 0x400>;
96 uart1_pins_a: uart1@0 {
97 allwinner,pins = "PE10", "PE11";
98 allwinner,function = "uart1";
99 allwinner,drive = <0>;
100 allwinner,pull = <0>;
103 uart1_pins_b: uart1@1 {
104 allwinner,pins = "PG3", "PG4";
105 allwinner,function = "uart1";
106 allwinner,drive = <0>;
107 allwinner,pull = <0>;
112 GPIO and interrupt controller
113 -----------------------------
115 This hardware also acts as a GPIO controller and an interrupt
118 Consumers that would want to refer to one or the other (or both)
119 should provide through the usual *-gpios and interrupts properties a
120 cell with 3 arguments, first the number of the bank, then the pin
121 inside that bank, and finally the flags for the GPIO/interrupts.
126 compatible = "nxp,pcf8574a";
132 interrupt-parent = <&pio>;
133 interrupts = <6 0 IRQ_TYPE_EDGE_FALLING>;
134 interrupt-controller;
135 #interrupt-cells = <2>;
138 reg_usb1_vbus: usb1-vbus {
139 compatible = "regulator-fixed";
140 regulator-name = "usb1-vbus";
141 regulator-min-microvolt = <5000000>;
142 regulator-max-microvolt = <5000000>;
143 gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>;