Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt

   1 * Allwinner A1X Pin Controller
   2
   3 The pins controlled by sunXi pin controller are organized in banks,
   4 each bank has 32 pins.  Each pin has 7 multiplexing functions, with
   5 the first two functions being GPIO in and out. The configuration on
   6 the pins includes drive strength and pull-up.
   7
   8 Required properties:
   9 - compatible: Should be one of the followings (depending on you SoC):
  10   "allwinner,sun4i-a10-pinctrl"
  11   "allwinner,sun5i-a10s-pinctrl"
  12   "allwinner,sun5i-a13-pinctrl"
  13   "allwinner,sun6i-a31-pinctrl"
  14   "allwinner,sun6i-a31s-pinctrl"
  15   "allwinner,sun6i-a31-r-pinctrl"
  16   "allwinner,sun7i-a20-pinctrl"
  17   "allwinner,sun8i-a23-pinctrl"
  18   "allwinner,sun8i-a23-r-pinctrl"
  19   "allwinner,sun8i-a33-pinctrl"
  20   "allwinner,sun9i-a80-pinctrl"
  21   "allwinner,sun9i-a80-r-pinctrl"
  22   "allwinner,sun8i-a83t-pinctrl"
  23   "allwinner,sun8i-h3-pinctrl"
  24   "allwinner,sun8i-h3-r-pinctrl"
  25   "allwinner,sun50i-a64-pinctrl"
  26   "nextthing,gr8-pinctrl"
  27
  28 - reg: Should contain the register physical address and length for the
  29   pin controller.
  30
  31 Please refer to pinctrl-bindings.txt in this directory for details of the
  32 common pinctrl bindings used by client devices.
  33
  34 A pinctrl node should contain at least one subnodes representing the
  35 pinctrl groups available on the machine. Each subnode will list the
  36 pins it needs, and how they should be configured, with regard to muxer
  37 configuration, drive strength and pullups. If one of these options is
  38 not set, its actual value will be unspecified.
  39
  40 Required subnode-properties:
  41
  42 - allwinner,pins: List of strings containing the pin name.
  43 - allwinner,function: Function to mux the pins listed above to.
  44
  45 Optional subnode-properties:
  46 - allwinner,drive: Integer. Represents the current sent to the pin
  47     0: 10 mA
  48     1: 20 mA
  49     2: 30 mA
  50     3: 40 mA
  51 - allwinner,pull: Integer.
  52     0: No resistor
  53     1: Pull-up resistor
  54     2: Pull-down resistor
  55
  56 Examples:
  57
  58 pio: pinctrl@01c20800 {
  59         compatible = "allwinner,sun5i-a13-pinctrl";
  60         reg = <0x01c20800 0x400>;
  61         #address-cells = <1>;
  62         #size-cells = <0>;
  63
  64         uart1_pins_a: uart1@0 {
  65                 allwinner,pins = "PE10", "PE11";
  66                 allwinner,function = "uart1";
  67                 allwinner,drive = <0>;
  68                 allwinner,pull = <0>;
  69         };
  70
  71         uart1_pins_b: uart1@1 {
  72                 allwinner,pins = "PG3", "PG4";
  73                 allwinner,function = "uart1";
  74                 allwinner,drive = <0>;
  75                 allwinner,pull = <0>;
  76         };
  77 };
  78
  79
  80 GPIO and interrupt controller
  81 -----------------------------
  82
  83 This hardware also acts as a GPIO controller and an interrupt
  84 controller.
  85
  86 Consumers that would want to refer to one or the other (or both)
  87 should provide through the usual *-gpios and interrupts properties a
  88 cell with 3 arguments, first the number of the bank, then the pin
  89 inside that bank, and finally the flags for the GPIO/interrupts.
  90
  91 Example:
  92
  93 xio: gpio@38 {
  94         compatible = "nxp,pcf8574a";
  95         reg = <0x38>;
  96
  97         gpio-controller;
  98         #gpio-cells = <2>;
  99
 100         interrupt-parent = <&pio>;
 101         interrupts = <6 0 IRQ_TYPE_EDGE_FALLING>;
 102         interrupt-controller;
 103         #interrupt-cells = <2>;
 104 };
 105
 106 reg_usb1_vbus: usb1-vbus {
 107         compatible = "regulator-fixed";
 108         regulator-name = "usb1-vbus";
 109         regulator-min-microvolt = <5000000>;
 110         regulator-max-microvolt = <5000000>;
 111         gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>;
 112 };