Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt

   1 Socionext UniPhier USB3 High-Speed (HS) PHY
   2
   3 This describes the devicetree bindings for PHY interfaces built into
   4 USB3 controller implemented on Socionext UniPhier SoCs.
   5 Although the controller includes High-Speed PHY and Super-Speed PHY,
   6 this describes about High-Speed PHY.
   7
   8 Required properties:
   9 - compatible: Should contain one of the following:
  10     "socionext,uniphier-pro4-usb3-hsphy" - for Pro4 SoC
  11     "socionext,uniphier-pxs2-usb3-hsphy" - for PXs2 SoC
  12     "socionext,uniphier-ld20-usb3-hsphy" - for LD20 SoC
  13     "socionext,uniphier-pxs3-usb3-hsphy" - for PXs3 SoC
  14 - reg: Specifies offset and length of the register set for the device.
  15 - #phy-cells: Should be 0.
  16 - clocks: A list of phandles to the clock gate for USB3 glue layer.
  17         According to the clock-names, appropriate clocks are required.
  18 - clock-names: Should contain the following:
  19     "gio", "link" - for Pro4 SoC
  20     "phy", "phy-ext", "link" - for PXs3 SoC, "phy-ext" is optional.
  21     "phy", "link" - for others
  22 - resets: A list of phandles to the reset control for USB3 glue layer.
  23         According to the reset-names, appropriate resets are required.
  24 - reset-names: Should contain the following:
  25     "gio", "link" - for Pro4 SoC
  26     "phy", "link" - for others
  27
  28 Optional properties:
  29 - vbus-supply: A phandle to the regulator for USB VBUS.
  30 - nvmem-cells: Phandles to nvmem cell that contains the trimming data.
  31         Available only for HS-PHY implemented on LD20 and PXs3, and
  32         if unspecified, default value is used.
  33 - nvmem-cell-names: Should be the following names, which correspond to
  34         each nvmem-cells.
  35         All of the 3 parameters associated with the following names are
  36         required for each port, if any one is omitted, the trimming data
  37         of the port will not be set at all.
  38     "rterm", "sel_t", "hs_i" - Each cell name for phy parameters
  39
  40 Refer to phy/phy-bindings.txt for the generic PHY binding properties.
  41
  42 Example:
  43
  44         usb-glue@65b00000 {
  45                 compatible = "socionext,uniphier-ld20-dwc3-glue",
  46                              "simple-mfd";
  47                 #address-cells = <1>;
  48                 #size-cells = <1>;
  49                 ranges = <0 0x65b00000 0x400>;
  50
  51                 usb_vbus0: regulator {
  52                         ...
  53                 };
  54
  55                 usb_hsphy0: hs-phy@200 {
  56                         compatible = "socionext,uniphier-ld20-usb3-hsphy";
  57                         reg = <0x200 0x10>;
  58                         #phy-cells = <0>;
  59                         clock-names = "link", "phy";
  60                         clocks = <&sys_clk 14>, <&sys_clk 16>;
  61                         reset-names = "link", "phy";
  62                         resets = <&sys_rst 14>, <&sys_rst 16>;
  63                         vbus-supply = <&usb_vbus0>;
  64                         nvmem-cell-names = "rterm", "sel_t", "hs_i";
  65                         nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>,
  66                                       <&usb_hs_i0>;
  67                 };
  68                 ...
  69         };