1 * Synopsys Designware PCIe interface
4 - compatible: should contain "snps,dw-pcie" to identify the core.
5 - #address-cells: set to <3>
6 - #size-cells: set to <2>
7 - device_type: set to "pci"
8 - ranges: ranges for the PCI memory and I/O regions
9 - #interrupt-cells: set to <1>
10 - interrupt-map-mask and interrupt-map: standard PCI properties
11 to define the mapping of the PCIe interface to interrupt
13 - num-lanes: number of lanes to use
14 - clocks: Must contain an entry for each entry in clock-names.
15 See ../clocks/clock-bindings.txt for details.
16 - clock-names: Must include the following entries:
21 - reset-gpio: gpio pin number of power good signal