Documentation/devicetree/bindings/nvmem/imx-ocotp.txt

   1 Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
   2
   3 This binding represents the on-chip eFuse OTP controller found on
   4 i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX and i.MX6UL SoCs.
   5
   6 Required properties:
   7 - compatible: should be one of
   8         "fsl,imx6q-ocotp" (i.MX6Q/D/DL/S),
   9         "fsl,imx6sl-ocotp" (i.MX6SL), or
  10         "fsl,imx6sx-ocotp" (i.MX6SX),
  11         "fsl,imx6ul-ocotp" (i.MX6UL),
  12         "fsl,imx7d-ocotp" (i.MX7D/S),
  13         followed by "syscon".
  14 - reg: Should contain the register base and length.
  15 - clocks: Should contain a phandle pointing to the gated peripheral clock.
  16
  17 Optional properties:
  18 - read-only: disable write access
  19
  20 Example:
  21
  22         ocotp: ocotp@21bc000 {
  23                 compatible = "fsl,imx6q-ocotp", "syscon";
  24                 reg = <0x021bc000 0x4000>;
  25                 clocks = <&clks IMX6QDL_CLK_IIM>;
  26                 read-only;
  27         };