1 * Qualcomm Atheros ath10k wireless devices
4 - compatible: Should be one of the following:
9 PCI based devices uses compatible string "qcom,ath10k" and takes calibration
10 data along with board specific data via "qcom,ath10k-calibration-data".
11 Rest of the properties are not applicable for PCI based devices.
13 AHB based devices (i.e. ipq4019) uses compatible string "qcom,ipq4019-wifi"
14 and also uses most of the properties defined in this doc (except
15 "qcom,ath10k-calibration-data"). It uses "qcom,ath10k-pre-calibration-data"
16 to carry pre calibration data.
18 In general, entry "qcom,ath10k-pre-calibration-data" and
19 "qcom,ath10k-calibration-data" conflict with each other and only one
20 can be provided per device.
22 SNOC based devices (i.e. wcn3990) uses compatible string "qcom,wcn3990-wifi".
24 - reg: Address and length of the register set for the device.
25 - reg-names: Must include the list of following reg names,
27 - interrupts: reference to the list of 17 interrupt numbers for "qcom,ipq4019-wifi"
29 reference to the list of 12 interrupt numbers for "qcom,wcn3990-wifi"
31 Must contain interrupt-names property per entry for
32 "qcom,ath10k", "qcom,ipq4019-wifi" compatible targets.
34 - interrupt-names: Must include the entries for MSI interrupt
35 names ("msi0" to "msi15") and legacy interrupt
36 name ("legacy") for "qcom,ath10k", "qcom,ipq4019-wifi"
40 - resets: Must contain an entry for each entry in reset-names.
41 See ../reset/reseti.txt for details.
42 - reset-names: Must include the list of following reset names,
49 - clocks: List of clock specifiers, must contain an entry for each required
51 - clock-names: Should contain the clock names "wifi_wcss_cmd", "wifi_wcss_ref",
52 "wifi_wcss_rtc" for "qcom,ipq4019-wifi" compatible target and
53 "cxo_ref_clk_pin" for "qcom,wcn3990-wifi"
55 - qcom,msi_addr: MSI interrupt address.
56 - qcom,msi_base: Base value to add before writing MSI data into
58 - qcom,ath10k-calibration-variant: string to search for in the board-2.bin
59 variant list with the same bus and device
61 - qcom,ath10k-calibration-data : calibration data + board specific data
62 as an array, the length can vary between
64 - qcom,ath10k-pre-calibration-data : pre calibration data as an array,
65 the length can vary between hw versions.
66 - <supply-name>-supply: handle to the regulator device tree node
67 optional "supply-name" are "vdd-0.8-cx-mx",
68 "vdd-1.8-xo", "vdd-1.3-rfa" and "vdd-3.3-ch0".
72 Definition: reference to the reserved-memory for the msa region
73 used by the wifi firmware running in Q6.
76 Value type: <prop-encoded-array>
77 Definition: A list of phandle and IOMMU specifier pairs.
81 Definition: Name of external front end module used. Some valid FEM names
82 for example: "microsemi-lx5586", "sky85703-11"
85 Example (to supply PCI based wifi block details):
87 In this example, the node is defined as child node of the PCI controller.
92 #interrupt-cells = <1>;
99 qcom,ath10k-calibration-data = [ 01 02 03 ... ];
100 ext-fem-name = "microsemi-lx5586";
105 Example (to supply ipq4019 SoC wifi block details):
107 wifi0: wifi@a000000 {
108 compatible = "qcom,ipq4019-wifi";
109 reg = <0xa000000 0x200000>;
110 resets = <&gcc WIFI0_CPU_INIT_RESET>,
111 <&gcc WIFI0_RADIO_SRIF_RESET>,
112 <&gcc WIFI0_RADIO_WARM_RESET>,
113 <&gcc WIFI0_RADIO_COLD_RESET>,
114 <&gcc WIFI0_CORE_WARM_RESET>,
115 <&gcc WIFI0_CORE_COLD_RESET>;
116 reset-names = "wifi_cpu_init",
122 clocks = <&gcc GCC_WCSS2G_CLK>,
123 <&gcc GCC_WCSS2G_REF_CLK>,
124 <&gcc GCC_WCSS2G_RTC_CLK>;
125 clock-names = "wifi_wcss_cmd",
128 interrupts = <0 0x20 0x1>,
145 interrupt-names = "msi0", "msi1", "msi2", "msi3",
146 "msi4", "msi5", "msi6", "msi7",
147 "msi8", "msi9", "msi10", "msi11",
148 "msi12", "msi13", "msi14", "msi15",
150 qcom,msi_addr = <0x0b006040>;
151 qcom,msi_base = <0x40>;
152 qcom,ath10k-pre-calibration-data = [ 01 02 03 ... ];
155 Example (to supply wcn3990 SoC wifi block details):
158 compatible = "qcom,wcn3990-wifi";
159 reg = <0x18800000 0x800000>;
160 reg-names = "membase";
161 clocks = <&clock_gcc clk_rf_clk2_pin>;
162 clock-names = "cxo_ref_clk_pin";
164 <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
165 <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
166 <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
167 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
168 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
169 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
170 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
171 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
172 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
173 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
174 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
175 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
176 vdd-0.8-cx-mx-supply = <&pm8998_l5>;
177 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
178 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
179 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
180 memory-region = <&wifi_msa_mem>;
181 iommus = <&apps_smmu 0x0040 0x1>;