1 TI SoC Ethernet Switch Controller Device Tree Bindings
2 ------------------------------------------------------
5 - compatible : Should be one of the below:-
6 "ti,cpsw" for backward compatible
7 "ti,am335x-cpsw" for AM335x controllers
8 "ti,am4372-cpsw" for AM437x controllers
9 "ti,dra7-cpsw" for DRA7x controllers
10 - reg : physical base address and size of the cpsw
12 - interrupts : property with a value describing the interrupt
14 - cpdma_channels : Specifies number of channels in CPDMA
15 - ale_entries : Specifies No of entries ALE can hold
16 - bd_ram_size : Specifies internal descriptor RAM size
17 - mac_control : Specifies Default MAC control register content
18 for the specific platform
19 - slaves : Specifies number for slaves
20 - active_slave : Specifies the slave to use for time stamping,
21 ethtool and SIOCGMIIPHY
22 - cpsw-phy-sel : Specifies the phandle to the CPSW phy mode selection
23 device. See also cpsw-phy-sel.txt for it's binding.
24 Note that in legacy cases cpsw-phy-sel may be
25 a child device instead of a phandle
26 (DEPRECATED, use phys property instead).
29 - ti,hwmods : Must be "cpgmac0"
30 - dual_emac : Specifies Switch to act as Dual EMAC
31 - syscon : Phandle to the system control device node, which is
32 the control module device of the am33x
33 - mode-gpios : Should be added if one/multiple gpio lines are
34 required to be driven so that cpsw data lines
35 can be connected to the phy via selective mux.
36 For example in dra72x-evm, pcf gpio has to be
37 driven low so that cpsw slave 0 and phy data
38 lines are connected via mux.
39 - cpts_clock_mult : Numerator to convert input clock ticks into nanoseconds
40 - cpts_clock_shift : Denominator to convert input clock ticks into nanoseconds
41 Mult and shift will be calculated basing on CPTS
42 rftclk frequency if both cpts_clock_shift and
43 cpts_clock_mult properties are not provided.
47 - phy-mode : See ethernet.txt file in the same directory
48 - phys : phandle on phy-gmii-sel PHY (see phy/ti-phy-gmii-sel.txt)
51 - dual_emac_res_vlan : Specifies VID to be used to segregate the ports
52 - mac-address : See ethernet.txt file in the same directory
53 - phy_id : Specifies slave phy id (deprecated, use phy-handle)
54 - phy-handle : See ethernet.txt file in the same directory
57 - fixed-link : See fixed-link.txt file in the same directory
59 Note: Exactly one of phy_id, phy-handle, or fixed-link must be specified.
61 Note: "ti,hwmods" field is used to fetch the base address and irq
62 resources from TI, omap hwmod data base during device registration.
63 Future plan is to migrate hwmod data base contents into device tree
64 blob so that, all the required data will be used from device tree dts
69 mac: ethernet@4a100000 {
70 compatible = "ti,cpsw";
71 reg = <0x4A100000 0x1000>;
72 interrupts = <55 0x4>;
73 interrupt-parent = <&intc>;
76 bd_ram_size = <0x2000>;
81 cpts_clock_mult = <0x80000000>;
82 cpts_clock_shift = <29>;
84 cpsw-phy-sel = <&phy_sel>;
86 phy_id = <&davinci_mdio>, <0>;
87 phy-mode = "rgmii-txid";
88 /* Filled in by U-Boot */
89 mac-address = [ 00 00 00 00 00 00 ];
90 phys = <&phy_gmii_sel 1 0>;
93 phy_id = <&davinci_mdio>, <1>;
94 phy-mode = "rgmii-txid";
95 /* Filled in by U-Boot */
96 mac-address = [ 00 00 00 00 00 00 ];
97 phys = <&phy_gmii_sel 2 0>;
102 mac: ethernet@4a100000 {
103 compatible = "ti,cpsw";
104 ti,hwmods = "cpgmac0";
105 cpdma_channels = <8>;
106 ale_entries = <1024>;
107 bd_ram_size = <0x2000>;
109 mac_control = <0x20>;
112 cpts_clock_mult = <0x80000000>;
113 cpts_clock_shift = <29>;
115 cpsw-phy-sel = <&phy_sel>;
116 cpsw_emac0: slave@0 {
117 phy_id = <&davinci_mdio>, <0>;
118 phy-mode = "rgmii-txid";
119 /* Filled in by U-Boot */
120 mac-address = [ 00 00 00 00 00 00 ];
121 phys = <&phy_gmii_sel 1 0>;
123 cpsw_emac1: slave@1 {
124 phy_id = <&davinci_mdio>, <1>;
125 phy-mode = "rgmii-txid";
126 /* Filled in by U-Boot */
127 mac-address = [ 00 00 00 00 00 00 ];
128 phys = <&phy_gmii_sel 2 0>;