Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: STMicroelectronics Flexible Memory Controller 2 (FMC2) Bindings
   8
   9 maintainers:
  10   - Christophe Kerello <christophe.kerello@st.com>
  11
  12 allOf:
  13   - $ref: "nand-controller.yaml#"
  14
  15 properties:
  16   compatible:
  17     const: st,stm32mp15-fmc2
  18
  19   reg:
  20     items:
  21       - description: Registers
  22       - description: Chip select 0 data
  23       - description: Chip select 0 command
  24       - description: Chip select 0 address space
  25       - description: Chip select 1 data
  26       - description: Chip select 1 command
  27       - description: Chip select 1 address space
  28
  29   interrupts:
  30     maxItems: 1
  31
  32   clocks:
  33     maxItems: 1
  34
  35   resets:
  36     maxItems: 1
  37
  38   dmas:
  39     items:
  40       - description: tx DMA channel
  41       - description: rx DMA channel
  42       - description: ecc DMA channel
  43
  44   dma-names:
  45     items:
  46       - const: tx
  47       - const: rx
  48       - const: ecc
  49
  50 patternProperties:
  51   "^nand@[a-f0-9]$":
  52     type: object
  53     properties:
  54       nand-ecc-step-size:
  55         const: 512
  56
  57       nand-ecc-strength:
  58         enum: [1, 4 ,8 ]
  59
  60 required:
  61   - compatible
  62   - reg
  63   - interrupts
  64   - clocks
  65
  66 examples:
  67   - |
  68     #include <dt-bindings/interrupt-controller/arm-gic.h>
  69     #include <dt-bindings/clock/stm32mp1-clks.h>
  70     #include <dt-bindings/reset/stm32mp1-resets.h>
  71     nand-controller@58002000 {
  72       compatible = "st,stm32mp15-fmc2";
  73       reg = <0x58002000 0x1000>,
  74             <0x80000000 0x1000>,
  75             <0x88010000 0x1000>,
  76             <0x88020000 0x1000>,
  77             <0x81000000 0x1000>,
  78             <0x89010000 0x1000>,
  79             <0x89020000 0x1000>;
  80             interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
  81             dmas = <&mdma1 20 0x10 0x12000a02 0x0 0x0>,
  82                    <&mdma1 20 0x10 0x12000a08 0x0 0x0>,
  83                    <&mdma1 21 0x10 0x12000a0a 0x0 0x0>;
  84             dma-names = "tx", "rx", "ecc";
  85             clocks = <&rcc FMC_K>;
  86             resets = <&rcc FMC_R>;
  87       #address-cells = <1>;
  88       #size-cells = <0>;
  89
  90       nand@0 {
  91         reg = <0>;
  92         nand-on-flash-bbt;
  93         #address-cells = <1>;
  94         #size-cells = <1>;
  95       };
  96     };
  97
  98 ...