Merge tag 'for-linus' of git://github.com/openrisc/linux
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / mtd / jedec,spi-nor.txt
1 * SPI NOR flash: ST M25Pxx (and similar) serial flash chips
2
3 Required properties:
4 - #address-cells, #size-cells : Must be present if the device has sub-nodes
5   representing partitions.
6 - compatible : May include a device-specific string consisting of the
7                manufacturer and name of the chip. A list of supported chip
8                names follows.
9                Must also include "jedec,spi-nor" for any SPI NOR flash that can
10                be identified by the JEDEC READ ID opcode (0x9F).
11
12                Supported chip names:
13                  at25df321a
14                  at25df641
15                  at26df081a
16                  mr25h128
17                  mr25h256
18                  mr25h10
19                  mr25h40
20                  mx25l4005a
21                  mx25l1606e
22                  mx25l6405d
23                  mx25l12805d
24                  mx25l25635e
25                  n25q064
26                  n25q128a11
27                  n25q128a13
28                  n25q512a
29                  s25fl256s1
30                  s25fl512s
31                  s25sl12801
32                  s25fl008k
33                  s25fl064k
34                  sst25vf040b
35                  m25p40
36                  m25p80
37                  m25p16
38                  m25p32
39                  m25p64
40                  m25p128
41                  w25x80
42                  w25x32
43                  w25q32
44                  w25q64
45                  w25q32dw
46                  w25q80bl
47                  w25q128
48                  w25q256
49
50                The following chip names have been used historically to
51                designate quirky versions of flash chips that do not support the
52                JEDEC READ ID opcode (0x9F):
53                  m25p05-nonjedec
54                  m25p10-nonjedec
55                  m25p20-nonjedec
56                  m25p40-nonjedec
57                  m25p80-nonjedec
58                  m25p16-nonjedec
59                  m25p32-nonjedec
60                  m25p64-nonjedec
61                  m25p128-nonjedec
62
63 - reg : Chip-Select number
64 - spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
65
66 Optional properties:
67 - m25p,fast-read : Use the "fast read" opcode to read data from the chip instead
68                    of the usual "read" opcode. This opcode is not supported by
69                    all chips and support for it can not be detected at runtime.
70                    Refer to your chips' datasheet to check if this is supported
71                    by your chip.
72 - broken-flash-reset : Some flash devices utilize stateful addressing modes
73                    (e.g., for 32-bit addressing) which need to be managed
74                    carefully by a system. Because these sorts of flash don't
75                    have a standardized software reset command, and because some
76                    systems don't toggle the flash RESET# pin upon system reset
77                    (if the pin even exists at all), there are systems which
78                    cannot reboot properly if the flash is left in the "wrong"
79                    state. This boolean flag can be used on such systems, to
80                    denote the absence of a reliable reset mechanism.
81
82 Example:
83
84         flash: m25p80@0 {
85                 #address-cells = <1>;
86                 #size-cells = <1>;
87                 compatible = "spansion,m25p80", "jedec,spi-nor";
88                 reg = <0>;
89                 spi-max-frequency = <40000000>;
90                 m25p,fast-read;
91         };