Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/nab/target...
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / mmc / tmio_mmc.txt
1 * Toshiba Mobile IO SD/MMC controller
2
3 The tmio-mmc driver doesn't probe its devices actively, instead its binding to
4 devices is managed by either MFD drivers or by the sh_mobile_sdhi platform
5 driver. Those drivers supply the tmio-mmc driver with platform data, that either
6 describe hardware capabilities, known to them, or are obtained by them from
7 their own platform data or from their DT information. In the latter case all
8 compulsory and any optional properties, common to all SD/MMC drivers, as
9 described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
10 optional bindings can be used.
11
12 Required properties:
13 - compatible:   "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
14                 "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
15                 "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
16                 "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
17                 "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
18                 "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
19                 "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
20                 "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
21                 "renesas,sdhi-r8a7791" - SDHI IP on R8A7791 SoC
22                 "renesas,sdhi-r8a7792" - SDHI IP on R8A7792 SoC
23                 "renesas,sdhi-r8a7793" - SDHI IP on R8A7793 SoC
24                 "renesas,sdhi-r8a7794" - SDHI IP on R8A7794 SoC
25                 "renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
26                 "renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC
27
28 - clocks: Most controllers only have 1 clock source per channel. However, on
29           some variations of this controller, the internal card detection
30           logic that exists in this controller is sectioned off to be run by a
31           separate second clock source to allow the main core clock to be turned
32           off to save power.
33           If 2 clocks are specified by the hardware, you must name them as
34           "core" and "cd". If the controller only has 1 clock, naming is not
35           required.
36           Below is the number clocks for each supported SoC:
37            1: SH73A0, R8A73A4, R8A7740, R8A7778, R8A7779, R8A7790
38               R8A7791, R8A7792, R8A7793, R8A7794, R8A7795, R8A7796
39            2: R7S72100
40
41 Optional properties:
42 - toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
43 - pinctrl-names: should be "default", "state_uhs"
44 - pinctrl-0: should contain default/high speed pin ctrl
45 - pinctrl-1: should contain uhs mode pin ctrl