ieee802154: remove set but not used variable 'status'
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / mmc / tmio_mmc.txt
1 * Toshiba Mobile IO SD/MMC controller
2
3 The tmio-mmc driver doesn't probe its devices actively, instead its binding to
4 devices is managed by either MFD drivers or by the sh_mobile_sdhi platform
5 driver. Those drivers supply the tmio-mmc driver with platform data, that either
6 describe hardware capabilities, known to them, or are obtained by them from
7 their own platform data or from their DT information. In the latter case all
8 compulsory and any optional properties, common to all SD/MMC drivers, as
9 described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
10 optional bindings can be used.
11
12 Required properties:
13 - compatible: should contain one or more of the following:
14                 "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
15                 "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
16                 "renesas,sdhi-r7s9210" - SDHI IP on R7S9210 SoC
17                 "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
18                 "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
19                 "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
20                 "renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
21                 "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
22                 "renesas,sdhi-r8a774a1" - SDHI IP on R8A774A1 SoC
23                 "renesas,sdhi-r8a774c0" - SDHI IP on R8A774C0 SoC
24                 "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC
25                 "renesas,sdhi-mmc-r8a77470" - SDHI/MMC IP on R8A77470 SoC
26                 "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
27                 "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
28                 "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
29                 "renesas,sdhi-r8a7791" - SDHI IP on R8A7791 SoC
30                 "renesas,sdhi-r8a7792" - SDHI IP on R8A7792 SoC
31                 "renesas,sdhi-r8a7793" - SDHI IP on R8A7793 SoC
32                 "renesas,sdhi-r8a7794" - SDHI IP on R8A7794 SoC
33                 "renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
34                 "renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC
35                 "renesas,sdhi-r8a77965" - SDHI IP on R8A77965 SoC
36                 "renesas,sdhi-r8a77970" - SDHI IP on R8A77970 SoC
37                 "renesas,sdhi-r8a77980" - SDHI IP on R8A77980 SoC
38                 "renesas,sdhi-r8a77990" - SDHI IP on R8A77990 SoC
39                 "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
40                 "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
41                 "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
42                 "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 SDHI
43                                            (not SDHI/MMC) controller
44                 "renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 or RZ/G2
45                                            SDHI controller
46
47
48                 When compatible with the generic version, nodes must list
49                 the SoC-specific version corresponding to the platform
50                 first followed by the generic version.
51
52 - clocks: Most controllers only have 1 clock source per channel. However, on
53           some variations of this controller, the internal card detection
54           logic that exists in this controller is sectioned off to be run by a
55           separate second clock source to allow the main core clock to be turned
56           off to save power.
57           If 2 clocks are specified by the hardware, you must name them as
58           "core" and "cd". If the controller only has 1 clock, naming is not
59           required.
60           Devices which have more than 1 clock are listed below:
61           2: R7S72100, R7S9210
62
63 Optional properties:
64 - pinctrl-names: should be "default", "state_uhs"
65 - pinctrl-0: should contain default/high speed pin ctrl
66 - pinctrl-1: should contain uhs mode pin ctrl
67
68 Example: R8A7790 (R-Car H2) SDHI controller nodes
69
70         sdhi0: sd@ee100000 {
71                 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
72                 reg = <0 0xee100000 0 0x328>;
73                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
74                 clocks = <&cpg CPG_MOD 314>;
75                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
76                        <&dmac1 0xcd>, <&dmac1 0xce>;
77                 dma-names = "tx", "rx", "tx", "rx";
78                 max-frequency = <195000000>;
79                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
80                 resets = <&cpg 314>;
81         };
82
83         sdhi1: sd@ee120000 {
84                 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
85                 reg = <0 0xee120000 0 0x328>;
86                 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
87                 clocks = <&cpg CPG_MOD 313>;
88                 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
89                        <&dmac1 0xc9>, <&dmac1 0xca>;
90                 dma-names = "tx", "rx", "tx", "rx";
91                 max-frequency = <195000000>;
92                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
93                 resets = <&cpg 313>;
94         };
95
96         sdhi2: sd@ee140000 {
97                 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
98                 reg = <0 0xee140000 0 0x100>;
99                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
100                 clocks = <&cpg CPG_MOD 312>;
101                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
102                        <&dmac1 0xc1>, <&dmac1 0xc2>;
103                 dma-names = "tx", "rx", "tx", "rx";
104                 max-frequency = <97500000>;
105                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
106                 resets = <&cpg 312>;
107         };
108
109         sdhi3: sd@ee160000 {
110                 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
111                 reg = <0 0xee160000 0 0x100>;
112                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
113                 clocks = <&cpg CPG_MOD 311>;
114                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
115                        <&dmac1 0xd3>, <&dmac1 0xd4>;
116                 dma-names = "tx", "rx", "tx", "rx";
117                 max-frequency = <97500000>;
118                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
119                 resets = <&cpg 311>;
120         };