Documentation/devicetree/bindings/mmc/tmio_mmc.txt

   1 * Toshiba Mobile IO SD/MMC controller
   2
   3 The tmio-mmc driver doesn't probe its devices actively, instead its binding to
   4 devices is managed by either MFD drivers or by the sh_mobile_sdhi platform
   5 driver. Those drivers supply the tmio-mmc driver with platform data, that either
   6 describe hardware capabilities, known to them, or are obtained by them from
   7 their own platform data or from their DT information. In the latter case all
   8 compulsory and any optional properties, common to all SD/MMC drivers, as
   9 described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
  10 optional bindings can be used.
  11
  12 Required properties:
  13 - compatible: should contain one or more of the following:
  14                 "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
  15                 "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
  16                 "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
  17                 "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
  18                 "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
  19                 "renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
  20                 "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
  21                 "renesas,sdhi-r8a774a1" - SDHI IP on R8A774A1 SoC
  22                 "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC
  23                 "renesas,sdhi-mmc-r8a77470" - SDHI/MMC IP on R8A77470 SoC
  24                 "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
  25                 "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
  26                 "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
  27                 "renesas,sdhi-r8a7791" - SDHI IP on R8A7791 SoC
  28                 "renesas,sdhi-r8a7792" - SDHI IP on R8A7792 SoC
  29                 "renesas,sdhi-r8a7793" - SDHI IP on R8A7793 SoC
  30                 "renesas,sdhi-r8a7794" - SDHI IP on R8A7794 SoC
  31                 "renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
  32                 "renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC
  33                 "renesas,sdhi-r8a77965" - SDHI IP on R8A77965 SoC
  34                 "renesas,sdhi-r8a77970" - SDHI IP on R8A77970 SoC
  35                 "renesas,sdhi-r8a77980" - SDHI IP on R8A77980 SoC
  36                 "renesas,sdhi-r8a77990" - SDHI IP on R8A77990 SoC
  37                 "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
  38                 "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
  39                 "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
  40                 "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 SDHI
  41                                            (not SDHI/MMC) controller
  42                 "renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 or RZ/G2
  43                                            SDHI controller
  44
  45
  46                 When compatible with the generic version, nodes must list
  47                 the SoC-specific version corresponding to the platform
  48                 first followed by the generic version.
  49
  50 - clocks: Most controllers only have 1 clock source per channel. However, on
  51           some variations of this controller, the internal card detection
  52           logic that exists in this controller is sectioned off to be run by a
  53           separate second clock source to allow the main core clock to be turned
  54           off to save power.
  55           If 2 clocks are specified by the hardware, you must name them as
  56           "core" and "cd". If the controller only has 1 clock, naming is not
  57           required.
  58           Devices which have more than 1 clock are listed below:
  59           2: R7S72100
  60
  61 Optional properties:
  62 - pinctrl-names: should be "default", "state_uhs"
  63 - pinctrl-0: should contain default/high speed pin ctrl
  64 - pinctrl-1: should contain uhs mode pin ctrl
  65
  66 Example: R8A7790 (R-Car H2) SDHI controller nodes
  67
  68         sdhi0: sd@ee100000 {
  69                 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
  70                 reg = <0 0xee100000 0 0x328>;
  71                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
  72                 clocks = <&cpg CPG_MOD 314>;
  73                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
  74                        <&dmac1 0xcd>, <&dmac1 0xce>;
  75                 dma-names = "tx", "rx", "tx", "rx";
  76                 max-frequency = <195000000>;
  77                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
  78                 resets = <&cpg 314>;
  79         };
  80
  81         sdhi1: sd@ee120000 {
  82                 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
  83                 reg = <0 0xee120000 0 0x328>;
  84                 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
  85                 clocks = <&cpg CPG_MOD 313>;
  86                 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
  87                        <&dmac1 0xc9>, <&dmac1 0xca>;
  88                 dma-names = "tx", "rx", "tx", "rx";
  89                 max-frequency = <195000000>;
  90                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
  91                 resets = <&cpg 313>;
  92         };
  93
  94         sdhi2: sd@ee140000 {
  95                 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
  96                 reg = <0 0xee140000 0 0x100>;
  97                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
  98                 clocks = <&cpg CPG_MOD 312>;
  99                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
 100                        <&dmac1 0xc1>, <&dmac1 0xc2>;
 101                 dma-names = "tx", "rx", "tx", "rx";
 102                 max-frequency = <97500000>;
 103                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 104                 resets = <&cpg 312>;
 105         };
 106
 107         sdhi3: sd@ee160000 {
 108                 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
 109                 reg = <0 0xee160000 0 0x100>;
 110                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 111                 clocks = <&cpg CPG_MOD 311>;
 112                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 113                        <&dmac1 0xd3>, <&dmac1 0xd4>;
 114                 dma-names = "tx", "rx", "tx", "rx";
 115                 max-frequency = <97500000>;
 116                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 117                 resets = <&cpg 311>;
 118         };