Documentation/devicetree/bindings/mmc/sdhci-msm.txt

   1 * Qualcomm SDHCI controller (sdhci-msm)
   2
   3 This file documents differences between the core properties in mmc.txt
   4 and the properties used by the sdhci-msm driver.
   5
   6 Required properties:
   7 - compatible: Should contain "qcom,sdhci-msm-v4".
   8 - reg: Base address and length of the register in the following order:
   9         - Host controller register map (required)
  10         - SD Core register map (required)
  11 - interrupts: Should contain an interrupt-specifiers for the interrupts:
  12         - Host controller interrupt (required)
  13 - pinctrl-names: Should contain only one value - "default".
  14 - pinctrl-0: Should specify pin control groups used for this controller.
  15 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock-names.
  16 - clock-names: Should contain the following:
  17         "iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
  18         "core"  - SDC MMC clock (MCLK) (required)
  19         "bus"   - SDCC bus voter clock (optional)
  20         "xo"    - TCXO clock (optional)
  21         "cal"   - reference clock for RCLK delay calibration (optional)
  22         "sleep" - sleep clock for RCLK delay calibration (optional)
  23
  24 Example:
  25
  26         sdhc_1: sdhci@f9824900 {
  27                 compatible = "qcom,sdhci-msm-v4";
  28                 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
  29                 interrupts = <0 123 0>;
  30                 bus-width = <8>;
  31                 non-removable;
  32
  33                 vmmc-supply = <&pm8941_l20>;
  34                 vqmmc-supply = <&pm8941_s3>;
  35
  36                 pinctrl-names = "default";
  37                 pinctrl-0 = <&sdc1_clk &sdc1_cmd &sdc1_data>;
  38
  39                 clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
  40                 clock-names = "core", "iface";
  41         };
  42
  43         sdhc_2: sdhci@f98a4900 {
  44                 compatible = "qcom,sdhci-msm-v4";
  45                 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
  46                 interrupts = <0 125 0>;
  47                 bus-width = <4>;
  48                 cd-gpios = <&msmgpio 62 0x1>;
  49
  50                 vmmc-supply = <&pm8941_l21>;
  51                 vqmmc-supply = <&pm8941_l13>;
  52
  53                 pinctrl-names = "default";
  54                 pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data>;
  55
  56                 clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
  57                 clock-names = "core", "iface";
  58         };