perf/x86/intel: Implement support for TSX Force Abort
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / mips / lantiq / rcu-gphy.txt
1 Lantiq XWAY SoC GPHY binding
2 ============================
3
4 This binding describes a software-defined ethernet PHY, provided by the RCU
5 module on newer Lantiq XWAY SoCs (xRX200 and newer).
6
7 -------------------------------------------------------------------------------
8 Required properties:
9 - compatible            : Should be one of
10                                 "lantiq,xrx200a1x-gphy"
11                                 "lantiq,xrx200a2x-gphy"
12                                 "lantiq,xrx300-gphy"
13                                 "lantiq,xrx330-gphy"
14 - reg                   : Addrress of the GPHY FW load address register
15 - resets                : Must reference the RCU GPHY reset bit
16 - reset-names           : One entry, value must be "gphy" or optional "gphy2"
17 - clocks                : A reference to the (PMU) GPHY clock gate
18
19 Optional properties:
20 - lantiq,gphy-mode      : GPHY_MODE_GE (default) or GPHY_MODE_FE as defined in
21                           <dt-bindings/mips/lantiq_xway_gphy.h>
22
23
24 -------------------------------------------------------------------------------
25 Example for the GPHys on the xRX200 SoCs:
26
27 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
28         gphy0: gphy@20 {
29                 compatible = "lantiq,xrx200a2x-gphy";
30                 reg = <0x20 0x4>;
31
32                 resets = <&reset0 31 30>, <&reset1 7 7>;
33                 reset-names = "gphy", "gphy2";
34                 clocks = <&pmu0 XRX200_PMU_GATE_GPHY>;
35                 lantiq,gphy-mode = <GPHY_MODE_GE>;
36         };