1 NVIDIA Tegra20 MC(Memory Controller)
4 - compatible : "nvidia,tegra20-mc"
5 - reg : Should contain 2 register ranges(address and length); see the
6 example below. Note that the MC registers are interleaved with the
7 GART registers, and hence must be represented as multiple ranges.
8 - interrupts : Should contain MC General interrupt.
9 - #reset-cells : Should be 1. This cell represents memory client module ID.
10 The assignments may be found in header file <dt-bindings/memory/tegra20-mc.h>
11 or in the TRM documentation.
14 mc: memory-controller@7000f000 {
15 compatible = "nvidia,tegra20-mc";
16 reg = <0x7000f000 0x024
18 interrupts = <0 77 0x04>;
22 video-codec@6001a000 {
23 compatible = "nvidia,tegra20-vde";
25 resets = <&mc TEGRA20_MC_RESET_VDE>;