1 * Samsung Multi Format Codec (MFC)
3 Multi Format Codec (MFC) is the IP present in Samsung SoCs which
4 supports high resolution decoding and encoding functionalities.
5 The MFC device driver is a v4l2 driver which can encode/decode
6 video raw/elementary streams and has support for all popular
10 - compatible : value should be either one among the following
11 (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
12 (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
13 (c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
14 (d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
15 (e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
17 - reg : Physical base address of the IP registers and length of memory
20 - interrupts : MFC interrupt number to the CPU.
21 - clocks : from common clock binding: handle to mfc clock.
22 - clock-names : from common clock binding: must contain "mfc",
23 corresponding to entry in the clocks property.
26 - power-domains : power-domain property defined with a phandle
27 to respective power domain.
28 - memory-region : from reserved memory binding: phandles to two reserved
29 memory regions, first is for "left" mfc memory bus interfaces,
30 second if for the "right" mfc memory bus, used when no SYSMMU
34 - samsung,mfc-r, samsung,mfc-l : support removed, please use memory-region
39 SoC specific DT entry:
42 compatible = "samsung,mfc-v5";
43 reg = <0x13400000 0x10000>;
44 interrupts = <0 94 0>;
45 power-domains = <&pd_mfc>;
46 clocks = <&clock 273>;
50 Reserved memory specific DT entry for given board (see reserved memory binding
51 for more information):
58 mfc_left: region@51000000 {
59 compatible = "shared-dma-pool";
61 reg = <0x51000000 0x800000>;
64 mfc_right: region@43000000 {
65 compatible = "shared-dma-pool";
67 reg = <0x43000000 0x800000>;
71 Board specific DT entry:
74 memory-region = <&mfc_left>, <&mfc_right>;