Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt

   1 * Amlogic Meson SAR (Successive Approximation Register) A/D converter
   2
   3 Required properties:
   4 - compatible:   depending on the SoC this should be one of:
   5                         - "amlogic,meson-gxbb-saradc" for GXBB
   6                         - "amlogic,meson-gxl-saradc" for GXL
   7                         - "amlogic,meson-gxm-saradc" for GXM
   8                 along with the generic "amlogic,meson-saradc"
   9 - reg:          the physical base address and length of the registers
  10 - clocks:       phandle and clock identifier (see clock-names)
  11 - clock-names:  mandatory clocks:
  12                         - "clkin" for the reference clock (typically XTAL)
  13                         - "core" for the SAR ADC core clock
  14                 optional clocks:
  15                         - "sana" for the analog clock
  16                         - "adc_clk" for the ADC (sampling) clock
  17                         - "adc_sel" for the ADC (sampling) clock mux
  18 - vref-supply:  the regulator supply for the ADC reference voltage
  19 - #io-channel-cells: must be 1, see ../iio-bindings.txt
  20
  21 Example:
  22         saradc: adc@8680 {
  23                 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
  24                 #io-channel-cells = <1>;
  25                 reg = <0x0 0x8680 0x0 0x34>;
  26                 clocks = <&xtal>,
  27                          <&clkc CLKID_SAR_ADC>,
  28                          <&clkc CLKID_SANA>,
  29                          <&clkc CLKID_SAR_ADC_CLK>,
  30                          <&clkc CLKID_SAR_ADC_SEL>;
  31                 clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
  32         };