Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt

   1 ARM Mali Utgard GPU
   2 ===================
   3
   4 Required properties:
   5   - compatible
   6     * Must be one of the following:
   7       + "arm,mali-300"
   8       + "arm,mali-400"
   9       + "arm,mali-450"
  10     * And, optionally, one of the vendor specific compatible:
  11       + allwinner,sun4i-a10-mali
  12       + allwinner,sun7i-a20-mali
  13       + allwinner,sun50i-h5-mali
  14       + amlogic,meson-gxbb-mali
  15       + amlogic,meson-gxl-mali
  16       + stericsson,db8500-mali
  17
  18   - reg: Physical base address and length of the GPU registers
  19
  20   - interrupts: an entry for each entry in interrupt-names.
  21     See ../interrupt-controller/interrupts.txt for details.
  22
  23   - interrupt-names:
  24     * ppX: Pixel Processor X interrupt (X from 0 to 7)
  25     * ppmmuX: Pixel Processor X MMU interrupt (X from 0 to 7)
  26     * pp: Pixel Processor broadcast interrupt (mali-450 only)
  27     * gp: Geometry Processor interrupt
  28     * gpmmu: Geometry Processor MMU interrupt
  29
  30   - clocks: an entry for each entry in clock-names
  31   - clock-names:
  32     * bus: bus clock for the GPU
  33     * core: clock driving the GPU itself
  34
  35 Optional properties:
  36   - interrupt-names and interrupts:
  37     * pmu: Power Management Unit interrupt, if implemented in hardware
  38
  39   - memory-region:
  40     Memory region to allocate from, as defined in
  41     Documentation/devicetree/bindi/reserved-memory/reserved-memory.txt
  42
  43   - operating-points-v2:
  44     Operating Points for the GPU, as defined in
  45     Documentation/devicetree/bindings/opp/opp.txt
  46
  47 Vendor-specific bindings
  48 ------------------------
  49
  50 The Mali GPU is integrated very differently from one SoC to
  51 another. In order to accomodate those differences, you have the option
  52 to specify one more vendor-specific compatible, among:
  53
  54   - allwinner,sun4i-a10-mali
  55     Required properties:
  56       * resets: phandle to the reset line for the GPU
  57
  58   - allwinner,sun7i-a20-mali
  59     Required properties:
  60       * resets: phandle to the reset line for the GPU
  61
  62   - allwinner,sun50i-h5-mali
  63     Required properties:
  64       * resets: phandle to the reset line for the GPU
  65
  66   - stericsson,db8500-mali
  67     Required properties:
  68       * interrupt-names and interrupts:
  69         + combined: combined interrupt of all of the above lines
  70
  71 Example:
  72
  73 mali: gpu@1c40000 {
  74         compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
  75         reg = <0x01c40000 0x10000>;
  76         interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
  77                      <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
  78                      <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
  79                      <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
  80                      <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
  81                      <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
  82                      <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
  83         interrupt-names = "gp",
  84                           "gpmmu",
  85                           "pp0",
  86                           "ppmmu0",
  87                           "pp1",
  88                           "ppmmu1",
  89                           "pmu";
  90         clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
  91         clock-names = "bus", "core";
  92         resets = <&ccu RST_BUS_GPU>;
  93 };
  94