Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt

   1 ARM Mali Utgard GPU
   2 ===================
   3
   4 Required properties:
   5   - compatible
   6     * Must be one of the following:
   7       + "arm,mali-300"
   8       + "arm,mali-400"
   9       + "arm,mali-450"
  10     * And, optionally, one of the vendor specific compatible:
  11       + allwinner,sun4i-a10-mali
  12       + allwinner,sun7i-a20-mali
  13       + amlogic,meson-gxbb-mali
  14       + amlogic,meson-gxl-mali
  15       + stericsson,db8500-mali
  16
  17   - reg: Physical base address and length of the GPU registers
  18
  19   - interrupts: an entry for each entry in interrupt-names.
  20     See ../interrupt-controller/interrupts.txt for details.
  21
  22   - interrupt-names:
  23     * ppX: Pixel Processor X interrupt (X from 0 to 7)
  24     * ppmmuX: Pixel Processor X MMU interrupt (X from 0 to 7)
  25     * pp: Pixel Processor broadcast interrupt (mali-450 only)
  26     * gp: Geometry Processor interrupt
  27     * gpmmu: Geometry Processor MMU interrupt
  28
  29   - clocks: an entry for each entry in clock-names
  30   - clock-names:
  31     * bus: bus clock for the GPU
  32     * core: clock driving the GPU itself
  33
  34 Optional properties:
  35   - interrupt-names and interrupts:
  36     * pmu: Power Management Unit interrupt, if implemented in hardware
  37
  38 Vendor-specific bindings
  39 ------------------------
  40
  41 The Mali GPU is integrated very differently from one SoC to
  42 another. In order to accomodate those differences, you have the option
  43 to specify one more vendor-specific compatible, among:
  44
  45   - allwinner,sun4i-a10-mali
  46     Required properties:
  47       * resets: phandle to the reset line for the GPU
  48
  49   - allwinner,sun7i-a20-mali
  50     Required properties:
  51       * resets: phandle to the reset line for the GPU
  52
  53   - stericsson,db8500-mali
  54     Required properties:
  55       * interrupt-names and interrupts:
  56         + combined: combined interrupt of all of the above lines
  57
  58 Example:
  59
  60 mali: gpu@1c40000 {
  61         compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
  62         reg = <0x01c40000 0x10000>;
  63         interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
  64                      <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
  65                      <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
  66                      <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
  67                      <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
  68                      <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
  69                      <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
  70         interrupt-names = "gp",
  71                           "gpmmu",
  72                           "pp0",
  73                           "ppmmu0",
  74                           "pp1",
  75                           "ppmmu1",
  76                           "pmu";
  77         clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
  78         clock-names = "bus", "core";
  79         resets = <&ccu RST_BUS_GPU>;
  80 };
  81