Merge tag 'selinux-pr-20180629' of git://git.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / gpu / arm,mali-midgard.txt
1 ARM Mali Midgard GPU
2 ====================
3
4 Required properties:
5
6 - compatible :
7   * Must contain one of the following:
8     + "arm,mali-t604"
9     + "arm,mali-t624"
10     + "arm,mali-t628"
11     + "arm,mali-t720"
12     + "arm,mali-t760"
13     + "arm,mali-t820"
14     + "arm,mali-t830"
15     + "arm,mali-t860"
16     + "arm,mali-t880"
17   * which must be preceded by one of the following vendor specifics:
18     + "amlogic,meson-gxm-mali"
19     + "rockchip,rk3288-mali"
20     + "rockchip,rk3399-mali"
21
22 - reg : Physical base address of the device and length of the register area.
23
24 - interrupts : Contains the three IRQ lines required by Mali Midgard devices.
25
26 - interrupt-names : Contains the names of IRQ resources in the order they were
27   provided in the interrupts property. Must contain: "job", "mmu", "gpu".
28
29
30 Optional properties:
31
32 - clocks : Phandle to clock for the Mali Midgard device.
33
34 - mali-supply : Phandle to regulator for the Mali device. Refer to
35   Documentation/devicetree/bindings/regulator/regulator.txt for details.
36
37 - operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt
38   for details.
39
40
41 Example for a Mali-T760:
42
43 gpu@ffa30000 {
44         compatible = "rockchip,rk3288-mali", "arm,mali-t760";
45         reg = <0xffa30000 0x10000>;
46         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
47                      <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
48                      <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
49         interrupt-names = "job", "mmu", "gpu";
50         clocks = <&cru ACLK_GPU>;
51         mali-supply = <&vdd_gpu>;
52         operating-points-v2 = <&gpu_opp_table>;
53         power-domains = <&power RK3288_PD_GPU>;
54 };
55
56 gpu_opp_table: opp_table0 {
57         compatible = "operating-points-v2";
58
59         opp@533000000 {
60                 opp-hz = /bits/ 64 <533000000>;
61                 opp-microvolt = <1250000>;
62         };
63         opp@450000000 {
64                 opp-hz = /bits/ 64 <450000000>;
65                 opp-microvolt = <1150000>;
66         };
67         opp@400000000 {
68                 opp-hz = /bits/ 64 <400000000>;
69                 opp-microvolt = <1125000>;
70         };
71         opp@350000000 {
72                 opp-hz = /bits/ 64 <350000000>;
73                 opp-microvolt = <1075000>;
74         };
75         opp@266000000 {
76                 opp-hz = /bits/ 64 <266000000>;
77                 opp-microvolt = <1025000>;
78         };
79         opp@160000000 {
80                 opp-hz = /bits/ 64 <160000000>;
81                 opp-microvolt = <925000>;
82         };
83         opp@100000000 {
84                 opp-hz = /bits/ 64 <100000000>;
85                 opp-microvolt = <912500>;
86         };
87 };