Merge tag 'xtensa-20170507' of git://github.com/jcmvbkbc/linux-xtensa
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / fpga / altera-pr-ip.txt
1 Altera Arria10 Partial Reconfiguration IP
2
3 Required properties:
4 - compatible : should contain "altr,a10-pr-ip"
5 - reg        : base address and size for memory mapped io.
6
7 Example:
8
9         fpga_mgr: fpga-mgr@ff20c000 {
10                 compatible = "altr,a10-pr-ip";
11                 reg = <0xff20c000 0x10>;
12         };