1 Allwinner A31 DMA Controller
3 This driver follows the generic DMA bindings defined in dma.txt.
7 - compatible: Must be one of
8 "allwinner,sun6i-a31-dma"
9 "allwinner,sun8i-a23-dma"
10 "allwinner,sun8i-a83t-dma"
11 "allwinner,sun8i-h3-dma"
12 "allwinner,sun8i-v3s-dma"
13 - reg: Should contain the registers base address and length
14 - interrupts: Should contain a reference to the interrupt used by this device
15 - clocks: Should contain a reference to the parent AHB clock
16 - resets: Should contain a reference to the reset controller asserting
18 - #dma-cells : Should be 1, a single cell holding a line request number
21 dma: dma-controller@01c02000 {
22 compatible = "allwinner,sun6i-a31-dma";
23 reg = <0x01c02000 0x1000>;
24 interrupts = <0 50 4>;
25 clocks = <&ahb1_gates 6>;
26 resets = <&ahb1_rst 6>;
32 DMA clients connected to the A31 DMA controller must use the format
33 described in the dma.txt file, using a two-cell specifier for each
34 channel: a phandle plus one integer cells.
35 The two cells in order are:
37 1. A phandle pointing to the DMA controller.
38 2. The port ID as specified in the datasheet
42 compatible = "allwinner,sun6i-a31-spi";
43 reg = <0x01c6a000 0x1000>;
44 interrupts = <0 67 4>;
45 clocks = <&ahb1_gates 22>, <&spi2_clk>;
46 clock-names = "ahb", "mod";
47 dmas = <&dma 25>, <&dma 25>;
48 dma-names = "rx", "tx";
49 resets = <&ahb1_rst 22>;