1 * Ingenic JZ4780 DMA Controller
5 - compatible: Should be one of:
10 - reg: Should contain the DMA channel registers location and length, followed
11 by the DMA controller registers location and length.
12 - interrupts: Should contain the interrupt specifier of the DMA controller.
13 - clocks: Should contain a clock specifier for the JZ4780 PDMA clock.
14 - #dma-cells: Must be <2>. Number of integer cells in the dmas property of
15 DMA clients (see below).
19 - ingenic,reserved-channels: Bitmask of channels to reserve for devices that
20 need a specific channel. These channels will only be assigned when explicitly
21 requested by a client. The primary use for this is channels 0 and 1, which
22 can be configured to have special behaviour for NAND/BCH when using
23 programmable firmware.
27 dma: dma-controller@13420000 {
28 compatible = "ingenic,jz4780-dma";
29 reg = <0x13420000 0x400
32 interrupt-parent = <&intc>;
35 clocks = <&cgu JZ4780_CLK_PDMA>;
39 ingenic,reserved-channels = <0x3>;
42 DMA clients must use the format described in dma.txt, giving a phandle to the
43 DMA controller plus the following 2 integer cells:
45 1. Request type: The DMA request type for transfers to/from the device on
46 the allocated channel, as defined in the SoC documentation.
48 2. Channel: If set to 0xffffffff, any available channel will be allocated for
49 the client. Otherwise, the exact channel specified will be used. The channel
50 should be reserved on the DMA controller using the ingenic,reserved-channels
55 uart0: serial@10030000 {
57 dmas = <&dma 0x14 0xffffffff
58 &dma 0x15 0xffffffff>;
59 dma-names = "tx", "rx";