1 * STMicroelectronics STM32 lcd-tft display controller
3 - ltdc: lcd-tft display controller host
4 must be a sub-node of st-display-subsystem
6 - compatible: "st,stm32-ltdc"
7 - reg: Physical base address of the IP registers and length of memory mapped region.
8 - clocks: A list of phandle + clock-specifier pairs, one for each
9 entry in 'clock-names'.
10 - clock-names: A list of clock names. For ltdc it should contain:
11 - "lcd" for the clock feeding the output pixel clock & IP clock.
12 - resets: reset to be used by the device (defined by use of RCC macro).
14 - Video port for RGB output.
22 ltdc: display-controller@40016800 {
23 compatible = "st,stm32-ltdc";
24 reg = <0x40016800 0x200>;
25 interrupts = <88>, <89>;
26 resets = <&rcc STM32F4_APB2_RESET(LTDC)>;
27 clocks = <&rcc 1 CLK_LCD>;
31 ltdc_out_rgb: endpoint {