Documentation/devicetree/bindings/cpufreq/cpufreq-dt.txt

   1 Generic cpufreq driver
   2
   3 It is a generic DT based cpufreq driver for frequency management.  It supports
   4 both uniprocessor (UP) and symmetric multiprocessor (SMP) systems which share
   5 clock and voltage across all CPUs.
   6
   7 Both required and optional properties listed below must be defined
   8 under node /cpus/cpu@0.
   9
  10 Required properties:
  11 - None
  12
  13 Optional properties:
  14 - operating-points: Refer to Documentation/devicetree/bindings/opp/opp.txt for
  15   details. OPPs *must* be supplied either via DT, i.e. this property, or
  16   populated at runtime.
  17 - clock-latency: Specify the possible maximum transition latency for clock,
  18   in unit of nanoseconds.
  19 - voltage-tolerance: Specify the CPU voltage tolerance in percentage.
  20 - #cooling-cells:
  21      Please refer to Documentation/devicetree/bindings/thermal/thermal.txt.
  22
  23 Examples:
  24
  25 cpus {
  26         #address-cells = <1>;
  27         #size-cells = <0>;
  28
  29         cpu@0 {
  30                 compatible = "arm,cortex-a9";
  31                 reg = <0>;
  32                 next-level-cache = <&L2>;
  33                 operating-points = <
  34                         /* kHz    uV */
  35                         792000  1100000
  36                         396000  950000
  37                         198000  850000
  38                 >;
  39                 clock-latency = <61036>; /* two CLK32 periods */
  40                 #cooling-cells = <2>;
  41         };
  42
  43         cpu@1 {
  44                 compatible = "arm,cortex-a9";
  45                 reg = <1>;
  46                 next-level-cache = <&L2>;
  47         };
  48
  49         cpu@2 {
  50                 compatible = "arm,cortex-a9";
  51                 reg = <2>;
  52                 next-level-cache = <&L2>;
  53         };
  54
  55         cpu@3 {
  56                 compatible = "arm,cortex-a9";
  57                 reg = <3>;
  58                 next-level-cache = <&L2>;
  59         };
  60 };