Documentation/devicetree/bindings/cpufreq/cpufreq-cpu0.txt

   1 Generic CPU0 cpufreq driver
   2
   3 It is a generic cpufreq driver for CPU0 frequency management.  It
   4 supports both uniprocessor (UP) and symmetric multiprocessor (SMP)
   5 systems which share clock and voltage across all CPUs.
   6
   7 Both required and optional properties listed below must be defined
   8 under node /cpus/cpu@0.
   9
  10 Required properties:
  11 - operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt
  12   for details
  13
  14 Optional properties:
  15 - clock-latency: Specify the possible maximum transition latency for clock,
  16   in unit of nanoseconds.
  17 - voltage-tolerance: Specify the CPU voltage tolerance in percentage.
  18 - #cooling-cells:
  19 - cooling-min-level:
  20 - cooling-max-level:
  21      Please refer to Documentation/devicetree/bindings/thermal/thermal.txt.
  22
  23 Examples:
  24
  25 cpus {
  26         #address-cells = <1>;
  27         #size-cells = <0>;
  28
  29         cpu@0 {
  30                 compatible = "arm,cortex-a9";
  31                 reg = <0>;
  32                 next-level-cache = <&L2>;
  33                 operating-points = <
  34                         /* kHz    uV */
  35                         792000  1100000
  36                         396000  950000
  37                         198000  850000
  38                 >;
  39                 clock-latency = <61036>; /* two CLK32 periods */
  40                 #cooling-cells = <2>;
  41                 cooling-min-level = <0>;
  42                 cooling-max-level = <2>;
  43         };
  44
  45         cpu@1 {
  46                 compatible = "arm,cortex-a9";
  47                 reg = <1>;
  48                 next-level-cache = <&L2>;
  49         };
  50
  51         cpu@2 {
  52                 compatible = "arm,cortex-a9";
  53                 reg = <2>;
  54                 next-level-cache = <&L2>;
  55         };
  56
  57         cpu@3 {
  58                 compatible = "arm,cortex-a9";
  59                 reg = <3>;
  60                 next-level-cache = <&L2>;
  61         };
  62 };